ST STM32G4 Series Reference Manual page 788

Operational amplifiers (OPAMP)
Table 200. Operational amplifier possible connection (continued)
Signal
OPAMP2_VOUT
PB2 (VINM0)
OPAMP3_VINM
PB10 (VINM1)
PB0 (VINP0)
OPAMP3_VINP PB13 (VINP1)
PA1 (VINP2)
OPAMP3_VOUT
PB10 (VINM0)
OPAMP4_VINM
PD8 (VINM1)
PB13 (VINP0)
OPAMP4_VINP PD11 (VINP1)
PB11 (VINP2)
OPAMP4_VOUT
PB15 (VINM0)
OPAMP5_VINM
PA3 (VINM1)
PB14 (VINP0)
OPAMP5_VINP PD12 (VINP1)
PC3 (VINP2)
OPAMP5_VOUT
PA1 (VINM0)
OPAMP6_VINM
PB1 (VINM1)
PB12 (VINP0)
OPAMP6_VINP PD9 (VINP1)
PB13 (VINP2)
OPAMP6_VOUT
1. This ADC channel is connected internally to the OPAMPx_VOUT when OPAINTOEN bit is set. In this case, the I/O on which
the OPAMPx_VOUT is available, can be used for another purpose
2. For category 3 devices only.
3. For category 4 devices only.
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Pin Internal
ADC2_IN3
PA6
ADC2_IN16
OPAMP3_VOUT or PGA
DAC3_CH2
ADC3_IN1/ADC1_IN12
PB1
ADC2_IN18
OPAMP4_VOUT or PGA
DAC4_CH1
ADC4_IN3/ADC1_IN11
PB12
ADC5_IN5
OPAMP5_VOUT or PGA
DAC4_CH2
ADC5_IN1
PA8
ADC5_IN3
OPAMP6_VOUT or PGA
DAC3_CH1
ADC12_IN14
PB11 ADC4_IN17
ADC3_IN17
The pin is connected when the OPAMP is
enabled and OPAMP internal output is
(1)
disabled. The ADC input is controlled by ADC
controlled by bits PGA_GAIN and VM_SEL
The pin is connected when the OPAMP is
enabled and OPAMP internal output is
(1) (1)
/ADC3_IN13
disabled. The ADC input is controlled by ADC
The pin is connected when the OPAMP is
enabled and OPAMP internal output is
(1)
disabled. The ADC input is controlled by ADC.
controlled by bits PGA_GAIN and VM_SEL.
The pin is connected when the OPAMP is
enabled and OPAMP internal output is
(1)
disabled. The ADC input is controlled by ADC.
The pin is connected when the OPAMP is
(1)(2)
enabled and OPAMP internal output is
disabled. The ADC input is controlled by ADC.
(1)(3)
RM0440 Rev 4
Comment
controlled by bit VP_SEL
controlled by bits PGA_GAIN
and VM_SEL
controlled by bit VP_SEL
controlled by bit VP_SEL.
controlled by bits PGA_GAIN
and VM_SEL.
controlled by bit VP_SEL.
RM0440