ST STM32G4 Series Reference Manual page 770

Digital-to-analog converter (DAC)
22.7.23 DAC sawtooth mode register (DAC_STMODR)
Address offset: 0x60
Reset value: 0x0000 0000
31 30 29
Res. Res. Res. Res.
15 14 13
Res. Res. Res. Res.
Bits 31:28 Reserved, must be kept at reset value.
Bits 27:24 STINCTRIGSEL2[3:0]: DAC channel2 sawtooth increment trigger selection
Refer to the trigger selection tables in
details on trigger configuration and mapping.
0000: SWTRIGB2
0001: dac_inc_ch2_trg1
....
1111: dac_inc_ch2_trg15
Note: These bits are available only on dual-channel DACs. Refer to
Bits 19:16 STRSTTRIGSEL2[3:0]: DAC channel2 sawtooth reset trigger selection
Refer to the trigger selection tables in
details on trigger configuration and mapping.
0000: SWTRIGB2
0001: dac_ch2_trg1
....
1111: dac_ch2_trg15
The mapping is the same as for TSEL2[3:0].
Note: These bits are available only on dual-channel DACs. Refer to
Bits 15:12 Reserved, must be kept at reset value.
770/2126
28 27 26 25
STINCTRIGSEL2[3:0]
rw
12 11 10 9
STINCTRIGSEL1[3:0]
rw
implementation.
implementation.
24 23 22
Res. Res.
8 7 6
Res. Res.
Section 22.4.2: DAC pins and internal signals
Section 22.4.2: DAC pins and internal signals
RM0440 Rev 4
21 20 19 18
Res. Res. STRSTTRIGSEL2[3:0]
5 4 3 2
Res. Res. STRSTTRIGSEL1[3:0]
Section 22.3: DAC
Section 22.3: DAC
RM0440
17 16
rw
1 0
rw
for
for