ST STM32G4 Series Reference Manual page 827

RM0440
Bit 3 T1CM_EN: TIM1 controlled mux mode enable
This bit is set and cleared by software. It is used to control automatically the switch between the
default selection (VP_SEL and VM_SEL) and the secondary selection (VPS_SEL and
VMS_SEL) of the inverting and non inverting inputs. This automatic switch is triggered by the
TIM1 CC6 output arriving on the OPAMP6 input multiplexers.
0: Automatic switch is disabled.
1: Automatic switch is enabled.
Bits 2:1 VPS_SEL: OPAMP6 Non inverting input secondary selection.
These bits are set and cleared by software. They are used to select the OPAMP6 non
inverting input when the controlled mux mode is enabled (T1CM_EN = 1 or T8CM_EN = 1 or
T20CM_EN = 1)
00: VINP0 pin connected to OPAMP6 VINP input
01: VINP1 pin connected to OPAMP6 VINP input
10: VINP2 pin connected to OPAMP6 VINP input
11: DAC3_CH1 connected to OPAMP6 VINP input
Bits 0 VMS_SEL: OPAMP6 inverting input secondary selection
This bit is set and cleared by software. It is used to select the OPAMP6 inverting input when the
controlled mux mode is enabled (T1CM_EN = 1 or T8CM_EN = 1 or T20CM_EN = 1)
When standalone mode is used (i.e. VM_SEL = "00" or "01"):
0: Input from VINM0
1: Input from VINM1
When PGA (VM_SEL = "10") or Follower mode (VM_SEL = "11") is used:
0: Resistor feedback output selected (PGA mode)
1: V selected as input minus (follower mode)
OUT
RM0440 Rev 4
Operational amplifiers (OPAMP)
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