ST STM32G4 Series Reference Manual page 1132

Advanced-control timers (TIM1/TIM8/TIM20)
and the synchronous signals. In particular, if MOE is set to 1 whereas it was low, a delay
must be inserted (dummy instruction) before reading it correctly. This is because the write
acts on the asynchronous signal whereas the read reflects the synchronous signal.
The sources for break (tim_brk) channel are:
•
External sources connected to one of the TIMx_BKIN pin (as per selection done in the
AFIO controller), with polarity selection and optional digital filtering
• Internal sources:
–
–
The sources for break2 (tim_brk2) are:
•
External sources connected to one of the TIMx_BKIN2 pin (as per selection done in the
AFIO controller), with polarity selection and optional digital filtering
•
Internal sources coming from a tim_brk2_cmpx input (refer to
TIM1/TIM8/TIM20 pins and internal signals
Break events can also be generated by software using BG and B2G bits in the TIMx_EGR
register.
All sources are ORed before entering the timer tim_brk or tim_brk2 inputs, as per
Figure 316
1132/2126
coming from a tim_brk_cmpx input (refer to
and internal signals for product specific implementation)
coming from a system break request (refer to
pins and internal signals
below.
Section 28.3.2: TIM1/TIM8/TIM20 pins
for product specific implementation)
for product specific implementation)
RM0440 Rev 4
Section 28.3.2: TIM1/TIM8/TIM20
Section 28.3.2:
RM0440