Table 270. Interconnect To The Tim_Ti1 Input Multiplexer - ST STM32G4 Series Reference Manual

RM0440
Internal signal name
tim_ker_ck
tim_it
tim_cc1_dma
tim_cc2_dma
tim_cc3_dma
tim_cc4_dma
tim_upd_dma
tim_trg_dma
tim_com_dma
Table 270,
tim_ti[1..4] input multiplexers.
tim_ti1 inputs
tim_ti1_in
tim_ti1_in
tim_ti1_in
tim_ti1_in
tim_ti1_in
tim_ti1_in
tim_ti1_in
tim_ti1_in
tim_ti1_in
tim_ti1_in
tim_ti1_in
tim_ti1_in
Table 269. TIM internal input/output signals (continued)
Table 271, Table 272

Table 270. Interconnect to the tim_ti1 input multiplexer

TIM2
0 TIM2_CH1
1 comp1_out
2 comp2_out
3 comp3_out
4 comp4_out
5 comp5_out
6
7
8 Reserved
9
10
[11..15]
General-purpose timers (TIM2/TIM3/TIM4/TIM5)
Signal type
Timer kernel clock. This clock must be
synchronous with tim_pclk (derived from the
Input same source). The clock ratio
tim_ker_ck/tim_pclk must be an integer:1, 2,
3,..., 8 (maximum value).
Global Timer interrupt, gathering
Output capture/compare, update, break trigger and
commutation requests.
Output Timer capture / compare 1..4 dma requests.
Output Timer update dma request.
Output Timer trigger dma request.
Output Timer commutation dma request.
and Table 273 are listing the sources connected to the
Sources
TIM3
TIM3_CH1
comp1_out
comp2_out
comp3_out
comp4_out
comp5_out
comp6_out
comp7_out
Reserved
Reserved
RM0440 Rev 4
Description
TIM4 TIM5
TIM4_CH1 TIM5_CH1
comp1_out
comp2_out
comp3_out RTC wake-up
comp4_out comp1_out
comp5_out comp2_out
comp6_out comp3_out
comp7_out comp4_out
comp5_out
Reserved comp6_out
comp7_out
LSI
LSE
1231/2126
1343