Table of Contents
Advertisement
5.4.3 When subsystem clock is not used
If it is not necessary to use the subsystem clock for low power consumption operations and watch operations,
connect the XT1 and XT2 pins as follows.
XT1: Connect directly to EV
XT2: Leave open
Note When the subsystem clock is not used, the on-chip feedback resistor must be set after a reset is released
so that it is not used (bit 6 (FRC) of processor clock control register (PCC) = 1).
Remark The feedback resistor is required to control the bias point of the oscillation waveform so that the bias
point is in the middle of the power supply voltage.
5.4.4 Ring-OSC oscillator
A Ring-OSC oscillator is incorporated in the 78K0/KE1+.
"Can be stopped by software" or "Cannot be stopped" can be selected using the option byte. The Ring-OSC
oscillator always oscillates the Ring-OSC clock after RESET release (240 kHz (TYP.)).
5.4.5 Prescaler
The prescaler generates various clocks by dividing the high-speed system clock oscillator output when the high-
speed system clock is selected as the clock to be supplied to the CPU.
Caution When the Ring-OSC clock is selected as the clock supplied to the CPU, the prescaler generates
various clocks by dividing the Ring-OSC oscillator output (f
CHAPTER 5 CLOCK GENERATOR
Note
or V
SS
SS
Figure 5-11. Subsystem Clock Feedback Resistor
FRC
P-ch
Feedback resistor
XT1
User's Manual U16899EJ2V0UD
XT2
= 240 kHz (TYP.)).
X
121
Advertisement
Table of Contents
