Details of output signals
The following describes the details of the output signals for the A/D converter module which are assigned to the CPU module.
The I/O numbers (X/Y) described in Appendix 2 are for the case when the start I/O number of the A/D converter module is set
to 0.
This section describes buffer memory addresses for CH1.
For details on the buffer memory addresses after CH2, refer to the following.
Page 125 List of buffer memory addresses
Operating condition setting request
Turn on and off Operating condition setting request (Y9) to enable the setting of the A/D converter module.
For the timing of turning the signal on and off, refer to the following.
Page 118 Operating condition setting completed flag
For details on the buffer memory areas to be enabled, refer to the following.
Page 125 List of buffer memory addresses
■Device number
The following shows the device number of this output signal.
Signal name
Operating condition setting request
User range write request
■Device number
The following shows the device number of this output signal.
Signal name
User range write request
■In the offset/gain setting mode
Turn on and off User range write request (YA) to register values adjusted with the offset/gain setting in the A/D converter
module. The data is written to the flash memory when this signal is turned off and on.
For the timing of turning the signal on and off, refer to the following.
Page 119 In the offset/gain setting mode
■In the normal mode
Turn on and off User range write request (YA) to restore the user range.
For the timing of turning the signal on and off, refer to the following.
Page 119 In the normal mode
Channel change request
Turn on and off Channel change request (YB) to change a channel to perform the offset/gain setting.
For the timing of turning the signal on and off, refer to the following.
Page 120 Channel change completed flag
■Device number
The following shows the device number of this output signal.
Signal name
Channel change request
CH1 to CH16
Y9
CH1 to CH16
YA
CH1 to CH16
YB
APPX
123
Appendix 2 I/O Signals
A