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4.3.6 Bit Manipulation Instructions
Bit manipulation operations are accomplished using the following instructions: bit test
(BTST), bit test and set (BSET), bit test and clear (BCLR), and bit test and change
(BCHG). All bit manipulation operations can be performed on either registers or mem-
ory. The bit number is specified as immediate data or in a data register. Register op-
erands are 32 bits long, and memory operands are 8 bits long. Table 4-6 is a summary
of bit manipulation instructions.
Instruction
BCHG
BCLR
BSET
BTST
4.3.7 Binary-Coded Decimal (BCD) Instructions
Five instructions support operations on BCD numbers. The arithmetic operations on
packed BCD numbers are add decimal with extend (ABCD), subtract decimal with ex-
tend (SBCD), and negate decimal with extend (NBCD). Table 4-7 is a summary of the
BCD operations.
Instruction
ABCD
NBCD
SBCD
4.3.8 Program Control Instructions
A set of subroutine call and return instructions and conditional and unconditional
branch instructions perform program control operations. Table 4-8 summarizes these
instructions.
Instruction
Bcc
DBcc
MOTOROLA
4-10
Table 4-6 Bit Manipulation Operations
Syntax
Operand Size
Dn, 〈ea〉
8, 32
#〈data〉, 〈ea〉
8, 32
Dn, 〈ea〉
8, 32
#〈data〉, 〈ea〉
8, 32
Dn, 〈ea〉
8, 32
#〈data〉, 〈ea〉
8, 32
Dn, 〈ea〉
8, 32
#〈data〉, 〈ea〉
8, 32
Table 4-7 Binary-Coded Decimal Operations
Syntax
Operand Size
Dn, Dn
– (An), – (An)
〈ea〉
Dn, Dn
– (An), – (An)
Table 4-8 Program Control Operations
Syntax
Operand Size
Conditional
〈label〉
8, 16, 32
Dn, 〈label〉
16
INSTRUCTION SET
(〈bit number〉 of destination) → Z →
bit of destination
(〈bit number〉 of destination) → Z;
0 → bit of destination
(〈bit number〉 of destination) → Z;
1 → bit of destination
(〈bit number〉 of destination) → Z
8
Source
+ Destination
10
8
8
0 – Destination
10
8
8
Destination
– Source
10
8
If condition true, then PC + d → PC
If condition false, then Dn – 1 → PC;
if Dn ≠ (– 1), then PC + d → PC
Operation
Operation
+ X → Destination
10
– X → Destination
– X → Destination
10
Operation
REFERENCE MANUAL
CPU32
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