Memory Operand Addressing - Motorola CPU32 Reference Manual

15
MSB
15
MSB
15
MSB
LONG WORD 0
LONG WORD 1
LONG WORD 2
15
MSB
ADDRESS 0
ADDRESS 1
ADDRESS 2
MSB = Most Significant Bit
LSB = Least Significant Bit
15
BCD 0
BCD 4
MSD = Most Significant Digit
LSD = Least Significant Digit
CPU32
REFERENCE MANUAL
1 BYTE = 8 BITS
7 6 5
BYTE 0
BYTE 2
WORD DATA / INSTRUCTION
LONG WORD DATA / INSTRUCTION
DECIMAL DATA
2 BCD DIGITS = 1 BYTE
12 11
MSD BCD 1
BCD 5
Figure 2-6 Memory Operand Addressing
ARCHITECTURE SUMMARY
BIT DATA
4 3 2 1
BYTE DATA
(8 BITS)
8 7
LSB
(16 BITS)
WORD 0
WORD 1
WORD 2
(32 BITS)
HIGH ORDER
LOW ORDER
ADDRESS
(32 BITS)
HIGH ORDER
LOW ORDER
8 7
LSD BCD 2
BCD 6
0
BYTE 1
BYTE 3
LSB
LSB
LSB
4 3
BCD 3
BCD 7
MOTOROLA
0
0
0
0
0
2-7