Motorola CPU32 Reference Manual page 86

BCHG
Instruction Fields (Bit Number Static):
Bit Number field — Specifies the bit number.
Effective Address field — Specifies the destination location.
Only data alterable addressing modes are allowed as shown:
Addressing Mode
Dn*
An
(An)
(An) +
– (An)
(d , An)
16
(d , An, Xn)
8
(bd, An, Xn)
*Long only; all others are byte only
Instruction Format (Bit Number Dynamic, specified in a register):
15 14 13
0 0 0
Instruction Fields (Bit Number Dynamic):
Register field — Specifies the data register that contains the bit number.
Effective Address field — Specifies the destination location. Only data alterable
addressing modes are allowed as shown:
Addressing Mode
Dn*
An
(An)
(An) +
– (An)
(d , An)
16
(d , An, Xn)
8
(bd, An, Xn)
*Long only; all others are byte only
MOTOROLA
4-38
Test a Bit and Change
Mode Register
000 Reg. number: Dn
— —
010 Reg. number: An
011 Reg. number: An
100 Reg. number: An
101 Reg. number: An
110 Reg. number: An
110 Reg. number: An
12 11 10 9
0 REGISTER
Mode Register
000 Reg. number: Dn
— —
010 Reg. number: An
011 Reg. number: An
100 Reg. number: An
101 Reg. number: An
110 Reg. number: An
110 Reg. number: An
INSTRUCTION SET
Addressing Mode
(xxx).W
(xxx).L
#〈data〉
(d , PC)
16
(d , PC, Xn)
8
(bd, PC, Xn)
8 7 6 5
1 0 1
Addressing Mode
(xxx).W
(xxx).L
#〈data〉
(d , PC)
16
(d , PC, Xn)
8
(bd, PC, Xn)
BCHG
Mode Register
111 000
111 001
— —
— —
— —
— —
4 3 2 1
EFFECTIVE ADDRESS
MODE REGISTER
Mode Register
111 000
111 001
— —
— —
— —
— —
REFERENCE MANUAL
0
CPU32