Table of Contents
Advertisement
7.2.8.12 Resume Execution (GO)
The pipeline is flushed and refilled before normal instruction execution is resumed.
Prefetching begins at the return PC and current privilege level. If either the PC or SR
is altered during BDM, the updated value of these registers is used when prefetching
commences.
The processor exits BDM when a bus error or address error occurs
on the first instruction prefetch from the new PC — the error is
trapped as a normal mode exception. The stacked value of the cur-
rent PC may not be valid in this case, depending on the state of the
machine prior to entering BDM. For address error, the PC does not
reflect the true return PC. Instead, the stacked fault address is the
(odd) return PC.
Command Format:
15
14
13
0
0
0
Command Sequence:
Operand Data:
None
Result Data:
None
7.2.8.13 Call User Code (CALL)
This instruction provides a convenient way to patch user code. The return PC is
stacked at the location pointed to by the current SP. The stacked PC serves as a return
address to be restored by the RTS command that terminates the patch routine. After
stacking is complete, the 32-bit operand data is loaded into the PC. The pipeline is
flushed and refilled from the location pointed to by the new PC. BDM is exited, and nor-
mal mode instruction execution begins.
If a bus error or address error occurs during return address stacking,
the CPU returns an error status via the serial interface and remains
in BDM.
MOTOROLA
7-22
12
11
10
9
0
1
1
0
GO
???
DEVELOPMENT SUPPORT
NOTE
8
7
6
5
0
0
0
0
NORMAL
MODE
XXX
NEXT CMD
"ILLEGAL"
"NOT READY"
NOTE
4
3
2
1
0
0
0
0
CPU32
REFERENCE MANUAL
0
0
Advertisement
Table of Contents
