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BCHG
Operation:
Assembler:
Description:
code appropriately, then inverts the specified bit. When the destination is a data regis-
ter, any of the 32 bits can be specified by the modulo 32 bit number. When the desti-
nation is a memory location, the operation is a byte operation, and the bit number is
modulo 8. In all cases, bit zero refers to the least significant bit. The bit number for
this operation may be specified in either of two ways:
1. Immediate — The bit number is specified by a second instruction word
2. Register — The specified data register contains the bit number.
Condition Codes:
X
N
Z
—
—
*
X
Not affected
N
Not affected
Z
Set if the bit tested is zero. Cleared otherwise
V
Not affected
C
Not affected
Instruction Format (Bit Number Static, specified as immediate data):
15
14
13
0
0
0
0
0
0
CPU32
REFERENCE MANUAL
Test a Bit and Change
(〈number〉 of Destination) → Z;
(〈number〉 of Destination) → 〈bit number〉 of Destination
BCHG Dn, 〈ea〉Syntax:
BCHG #〈data〉, 〈ea〉Attributes:
Size = (Byte, Long)
Tests a specified bit in the destination operand, sets the Z condition
V
C
—
—
12
11
10
9
0
1
0
0
0
0
0
0
INSTRUCTION SET
8
7
6
5
0
0
1
0
BCHG
4
3
2
1
EFFECTIVE ADDRESS
MODE
REGISTER
BIT NUMBER
MOTOROLA
0
4-37
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