Motorola CPU32 Reference Manual page 90

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BKPT
Operation:
Assembler
Syntax:
Attributes:
Description:
address bus are set to the value of the immediate data (0 to 7) and bits 0 and 1 of the
address bus are set to 0.
The breakpoint acknowledge cycle accesses the CPU space, addressing type 0, and
provides the breakpoint number specified by the instruction on address lines A4 to A2.
If external hardware terminates the cycle with DSACKx, the data on the bus (an in-
struction word) is inserted into the instruction pipe and is executed after the breakpoint
instruction. The breakpoint instruction requires a word transfer — if the first bus cycle
accesses an 8-bit port, a second cycle is required. If external logic terminates the
breakpoint acknowledge cycle with BERR (i.e., no instruction word available) the pro-
cessor takes an illegal instruction exception. Refer to 6.2.5 Software Breakpoints for
details of breakpoint operation.
This instruction supports breakpoints for debug monitors and real-time hardware em-
ulators. The exact operation performed by the instruction is implementation-depen-
dent. Typically, this instruction replaces an instruction in a program and the replaced
instruction is returned by the breakpoint acknowledge cycle.
Condition Codes: Not affected.
Instruction Format:
15
14
13
0
1
0
Instruction Fields:
Vector field — Contains immediate data in the range (0–7). This is the breakpoint
number.
MOTOROLA
4-42
Breakpoint
Run breakpoint acknowledge cycle;
If acknowledged
then execute returned operation word
else TRAP as illegal instruction
BKPT #〈data〉
Unsized
Executes a breakpoint acknowledge bus cycle. Bits [2:4] of the
12
11
10
9
0
1
0
0
INSTRUCTION SET
8
7
6
5
0
0
1
0
BKPT
4
3
2
1
0
1
VECTOR
CPU32
REFERENCE MANUAL
0

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