Motorola CPU32 Reference Manual page 93

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BSET
Instruction Fields (Bit Number Static):
Bit Number field — Specifies the bit number.
Effective Address field — Specifies the destination location. Only data alterable
addressing modes are allowed as shown:
Addressing Mode
Dn*
An
(An)
(An) +
– (An)
(d
, An)
16
(d
, An, Xn)
8
(bd, An, Xn)
*Long only; all others are byte only
Instruction Format (Bit Number Dynamic, specified in a register):
15
14
13
0
0
0
Instruction Fields (Bit Number Dynamic):
Register field — Specifies the data register that contains the bit number.
Effective Address field — Specifies the destination location. Only data alterable
addressing modes are allowed as shown:
Addressing Mode
Dn*
An
(An)
(An) +
– (An)
(d
, An)
16
(d
, An, Xn)
8
(bd, An, Xn)
*Long only; all others are byte only
CPU32
REFERENCE MANUAL
Test a Bit and Set
Mode
Register
000
Reg. number: Dn
010
Reg. number: An
011
Reg. number: An
100
Reg. number: An
101
Reg. number: An
110
Reg. number: An
110
Reg. number: An
12
11
10
9
0
REGISTER
Mode
Register
000
Reg. number: Dn
010
Reg. number: An
011
Reg. number: An
100
Reg. number: An
101
Reg. number: An
110
Reg. number: An
110
Reg. number: An
INSTRUCTION SET
Addressing Mode
(xxx).W
(xxx).L
#〈data〉
(d
, PC)
16
(d
, PC, Xn)
8
(bd, PC, Xn)
8
7
6
5
1
1
1
Addressing Mode
(xxx).W
(xxx).L
#〈data〉
(d
, PC)
16
(d
, PC, Xn)
8
(bd, PC, Xn)
BSET
Mode
Register
111
000
111
001
4
3
2
1
EFFECTIVE ADDRESS
MODE
REGISTER
Mode
Register
111
000
111
001
MOTOROLA
0
4-45

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