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15
14
13
0
1
0
TR
MV is set, indicating that MOVEM should be continued from the point where the fault
occurred upon return from the exception handler. TR, B1, and B0 are set if a corre-
sponding exception is pending when the BERR exception is taken. IN is set if a bus
fault occurs while refetching an opcode or an extension word during instruction restart.
RW, LG, SIZ, and FUNC all reflect the type of bus cycle that caused the fault. All write
faults have the RR bit set, to indicate that the write should be rerun upon return from
the exception handler.
The remainder of the stack frame contains sufficient information to continue MOVEM
with operand transfer following a faulted transfer. The address of the next operand to
be transferred, incremented or decremented by operand size, is stored in the faulted
address location ($08). The stacked transfer counter is set to 16 minus the number of
transfers attempted (including the faulted cycle). Refer to Figure 6-3 for the stacking
format.
6.3.1.4 Type IV: Faults During Exception Processing
The fourth type of fault occurs during exception processing. If this exception is a sec-
ond address or bus error, the machine halts in the "double bus fault" condition. How-
ever, if the exception is one that causes a four- or six-word stack frame to be written,
a bus cycle fault frame is written below the faulted exception stack frame.
The SSW for a fault within an exception contains the following bit pattern:
15
14
13
1
0
0
TR
15
TR, B1, and B0 are set if a corresponding exception is pending when the BERR ex-
ception is taken.
The contents of the faulted exception stack frame are included in the bus fault stack
frame. The pre-exception status register and the format/vector word of the faulted
frame are stacked. The type of exception can be determined from the format/vector
word. If the faulted exception stack frame contains six words, the program counter of
the instruction that caused the initial exception is also stacked. This data is placed on
the stack in the format shown in Figure 6-4. The return address from the initial excep-
tion is stacked for RTE.
6.3.2 Correcting a Fault
Fault correction methods are discussed in the following paragraphs.
There are two ways to complete a faulted released write bus cycle. The first is to use
a software handler. The second is to rerun the bus cycle via RTE.
Type II fault handlers must terminate with RTE, but specific requirements must also be
met before an instruction is restarted.
MOTOROLA
6-18
12
11
10
9
B1
B0
RR
12
11
10
9
B1
B0
0
EXCEPTION PROCESSING
8
7
6
5
0
IN
RW
LG
8
7
6
5
0
0
1
LG
4
3
2
SIZ
FUNC
4
3
2
SIZ
FUNC
CPU32
REFERENCE MANUAL
0
0
0
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