Motorola CPU32 Reference Manual page 202

TBLS
TBLSN
Operation:
Assembler
Syntax:
Attributes:
Description:
the efficient use of compressed linear data tables to model complex functions. The
TBLS instruction has two modes of operation: table lookup and interpolate mode, and
data register interpolate mode.
For table lookup and interpolate mode, data register Dx [15:0] contains the indepen-
dent variable X. The effective address points to the start of a signed byte, word, or
long-word table containing a linear representation of the dependent variable, Y, as a
function of X. In general, the independent variable, located in the low-order word of Dx,
consists of an 8-bit integer part and an 8-bit fractional part. An assumed radix point is
located between bits 7 and 8. The integer part, Dx [15:8], is scaled by the operand size
and is used as an offset into the table. The selected entry in the table is subtracted
from the next consecutive entry. A fractional portion of this difference is taken by mul-
tiplying by the interpolation fraction, Dx [7:0]. The adjusted difference is then added to
the selected table entry. The result is returned in the destination data register, Dx.
For register interpolate mode, the interpolation occurs using the Dym and Dyn regis-
ters in place of the two table entries. For this mode, only the fractional portion, Dx [7:0],
is used in the interpolation, and the integer portion, Dx [15:8], is ignored. The register
interpolation mode may be used with several table lookup and interpolations to model
multidimensional functions.
MOTOROLA
4-154
Table Lookup and Interpolate (Signed)
Rounded:
ENTRY + {(ENTRY
(n)
Unrounded:
∗ 256 + {(ENTRY
ENTRY
(n)
Where ENTRY and ENTRY
(n)
1. Consecutive entries in the table pointed to by the 〈ea〉 and
indexed by Dx [15:8] ∗ size or,
2. The registers Dym, Dyn, respectively
TBLS.〈size〉〈ea〉,Dx(Result rounded)
TBLSN.〈size〉〈ea〉,Dx(Result not rounded)
TBLS.〈size〉Dym:Dyn,Dx(Result rounded)
TBLSN.〈size〉Dym:Dyn, Dx(Result not rounded)
Size = (Byte, Word, Long)
The signed table lookup and interpolate instruction, TBLS, allows
INSTRUCTION SET
) ∗ Dx [7:0]} / 256 → Dx
– ENTRY
(n + 1) (n)
– ENTRY
(n + 1)
are either:
(n + 1)
TBLS
TBLSN
) ∗ Dx [7:0]} → Dx
(n)
CPU32
REFERENCE MANUAL