Privilege Violations - Motorola CPU32 Reference Manual

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All unimplemented instructions are reserved for use by Motorola for enhancements
and extensions to the basic M68000 architecture. Opcode pattern $4AFC is defined to
be illegal on all M68000 Family members. Those customers requiring the use of an
unimplemented opcode for synthesis of "custom instructions," operating system calls,
etc., should use this opcode.
Exception processing for illegal and unimplemented instructions is similar to that for
traps. The instruction is fetched and decoding is attempted. When the processor de-
termines that execution of an illegal instruction is being attempted, exception process-
ing begins. No registers are altered.
Exception processing follows the regular sequence. The vector number is generated
to refer to the illegal instruction vector or, in the case of an unimplemented instruction,
to the corresponding emulation vector. The illegal instruction vector number, current
program counter, and a copy of the status register are saved on the supervisor stack,
with the saved value of the program counter being the address of the illegal or unim-
plemented instruction.

6.2.9 Privilege Violations

To provide system security, certain instructions can be executed only at the supervisor
access level An attempt to execute one of these instructions at the user level will cause
an exception. The privileged exceptions are as follows:
• AND Immediate to SR
• EOR Immediate to SR
• LPSTOP
• MOVE from SR
• MOVE to SR
• MOVE USP
• MOVEC
• MOVES
• OR Immediate to SR
• RESET
• RTE
• STOP
Exception processing for privilege violations is nearly identical to that for illegal instruc-
tions. The instruction is fetched and decoded. If the processor determines that a priv-
ilege violation has occurred, exception processing begins before instruction execution.
Exception processing follows the regular sequence. The vector number (8) is gener-
ated to reference the privilege violation vector. Privilege violation vector offset, current
program counter, and status register are saved on the supervisor stack. The saved
program counter value is the address of the first word of the instruction causing the
privilege violation.
MOTOROLA
6-10
EXCEPTION PROCESSING
CPU32
REFERENCE MANUAL

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