Motorola CPU32 Reference Manual page 171

OR
Effective Address field — If the location specified is a source operand, only data
addressing modes are allowed as shown:
Addressing Mode
Dn
An
(An)
(An) +
– (An)
(d , An)
16
(d , An, Xn)
8
(bd, An, Xn)
If the location specified is a destination operand, only memory alterable addressing
modes are allowed as shown:
Addressing Mode
Dn
An
(An)
(An) +
– (An)
(d , An)
16
(d , An, Xn)
8
(bd, An, Xn)
NOTES:
1. If the destination is a data register, it must be specified using the destination Dn mode, not the
destination 〈ea〉 mode.
2. Most assemblers use ORI when the source is immediate data.
CPU32
REFERENCE MANUAL
Inclusive Logical OR
Mode Register
000 Reg. number: Dn
— —
010 Reg. number: An
011 Reg. number: An
100 Reg. number: An
101 Reg. number: An
110 Reg. number: An
110 Reg. number: An
Mode Register
— —
— —
010 Reg. number: An
011 Reg. number: An
100 Reg. number: An
101 Reg. number: An
110 Reg. number: An
110 Reg. number: An
INSTRUCTION SET
Addressing Mode Mode
(xxx).W 111
(xxx).L 111
#〈data〉 111
(d , PC)
111
16
(d , PC, Xn)
111
8
(bd, PC, Xn) 111
Addressing Mode Mode
(xxx).W 111
(xxx).L 111
#〈data〉 —
(d , PC)
—
16
(d , PC, Xn)
—
8
(bd, PC, Xn) —
OR
Register
000
001
100
010
011
011
Register
000
001
—
—
—
—
MOTOROLA
4-123