Exception Vector Assignments; Types Of Exceptions - Motorola CPU32 Reference Manual

Vector
Number
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16–23
24
25
26
27
28
29
30
31
32–47
48–58
59–63
64–255
Each vector is assigned an 8-bit number. Vector numbers for some exceptions are ob-
tained from an external device; others are supplied by the processor. The processor
multiplies the vector number by four to calculate vector offset, then adds the offset to
the contents of the VBR. The sum is the memory address of the vector.

6.1.2 Types of Exceptions

An exception can be caused by internal or external events.
An internal exception can be generated by an instruction or by an error. The TRAP,
TRAPcc, TRAPV, BKPT, CHK, CHK2, RTE, and DIV instructions can cause excep-
tions during normal execution. Illegal instructions, instruction fetches from odd ad-
dresses, word or long-word operand accesses from odd addresses, and privilege
violations also cause internal exceptions.
MOTOROLA
6-2
Table 6-1 Exception Vector Assignments
Vector Offset
Dec Hex
0 000
4 004
8 008
12 00C
16 010
20 014
24 018
28 01C
32 020
36 024
40 028
44 02C
48 030
52 034
56 038
60 03C
64 040
92 05C
96 060
100 064
104 068
108 06C
112 070
116 074
120 078
124 07C
128 080
188 0BC
192 0C0
232 0E8
236 0EC
252 0FC
256 100
1020 3FC
EXCEPTION PROCESSING
Space
SP Reset: Initial Stack Pointer
SP Reset: Initial Program Counter
SD Bus Error
SD Address Error
SD Illegal Instruction
SD Zero Division
SD CHK, CHK2 Instructions
SD TRAPcc, TRAPV Instructions
SD Privilege Violation
SD Trace
SD Line 1010 Emulator
SD Line 1111 Emulator
SD Hardware Breakpoint
SD (Reserved, Coprocessor Protocol Violation)
SD Format Error and Uninitialized Interrupt
SD Format Error and Uninitialized Interrupt
SD
(Unassigned, Reserved)
SD Spurious Interrupt
SD Level 1 Interrupt Autovector
SD Level 2 Interrupt Autovector
SD Level 3 Interrupt Autovector
SD Level 4 Interrupt Autovector
SD Level 5 Interrupt Autovector
SD Level 6 Interrupt Autovector
SD Level 7 Interrupt Autovector
SD
Trap Instruction Vectors (0–15)
SD
(Reserved, Coprocessor)
SD
(Unassigned, Reserved)
SD
User Defined Vectors (192)
Assignment
REFERENCE MANUAL
CPU32