This section describes the set of instructions provided in the CPU32 and demonstrates
their use. Descriptions of the instruction format and the operands used by instructions
are included. After a summary of the instructions by category, a detailed description of
each instruction is listed in alphabetical order. Complete programming information is
provided, as well as a description of condition code computation and an instruction for-
mat summary.
The CPU32 instructions include machine functions for all the following operations:
• Data movement
• Arithmetic operations
• Logical operations
• Shifts and rotates
• Bit manipulation
• Conditionals and branches
• System control
The large instruction set encompasses a complete range of capabilities and, com-
bined with the enhanced addressing modes, provides a flexible base for program de-
velopment.
4.1 M68000 Family Compatibility
It is the philosophy of the M68000 Family that all user-mode programs can execute
unchanged on a more advanced processor and that supervisor-mode programs and
exception handlers should require only minimal alteration.
The CPU32 can be thought of as an intermediate member of the M68000 Family. Ob-
ject code from an MC68000 or MC68010 may be executed on the CPU32, and many
of the instruction and addressing mode extensions of the MC68020 are also support-
ed.
4.1.1 New Instructions
Two instructions have been added to the M68000 instruction set for use in controller
applications. These are the low-power stop (LPSTOP) and the table lookup and inter-
polation (TBL) commands.
4.1.1.1 Low-Power Stop (LPSTOP)
In applications where power consumption is a consideration, the CPU32 can force the
device into a low-power standby mode when immediate processing is not required.
The low-power mode is entered by executing the LPSTOP instruction. The processor
remains in this mode until a user-specified or higher level interrupt, or a reset, occurs.
CPU32
REFERENCE MANUAL
SECTION 4
INSTRUCTION SET
INSTRUCTION SET
MOTOROLA
4-1