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3.5.2 General Addressing Mode Summary
The addressing modes described in the previous paragraphs are derived from specific
combinations of options in the indexing mode or a selection of two alternate address-
ing modes. For example, the addressing mode called register indirect (Rn) assembles
as address register indirect if the register is an address register. If Rn is a data register,
the assembler uses address register indirect with index mode, with a data register as
the indirect register, and suppresses the address register by setting the base suppress
bit in the EA specification.
Assigning an address register as Rn provides higher performance than using a data
register as Rn. Another case is (bd, An), which selects an addressing mode based on
the size of the displacement. If the displacement is 16 bits or less, the address register
indirect with displacement mode (d
quired, the address register indirect with index (bd, An, Xn) is used with the index reg-
ister suppressed.
It is useful to examine the derived addressing modes available to a programmer (with-
out regard to the CPU32 EA mode actually encoded) because the programmer need
not be concerned about these decisions. The assembler can choose the more efficient
addressing mode to encode.
3.6 M68000 Family Addressing Capability
Programs can be easily transported from one member of the M68000 Family to anoth-
er. The user object code of earlier members of the family is upwardly compatible with
later members and can be executed without change. The address extension word(s)
are encoded with information that allows the CPU32 to distinguish new additions to the
basic M68000 Family architecture.
Earlier microprocessors have no knowledge of extension word formats implemented
in later processors, and, while they do detect illegal instructions, they do not decode
invalid encodings of the extension words as exceptions.
Address extension words for the early MC68000, MC68008, MC68010, and MC68020
microprocessors are shown in Figure 3-6.
MOTOROLA
DATA ORGANIZATION AND ADDRESSING CAPABILITIES
3-14
, An) is used. When a 32-bit displacement is re-
16
CPU32
REFERENCE MANUAL
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