Figure D-1 Status Register (Sr - Motorola DSP56309 User Manual

24-bit digital signal processor
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Application:
Central Processor
Unnormalized ( U = Acc(47) xnor Acc(46) )
Extension
Limit
FFT Scaling ( S = Acc(46) xor Acc(45) )
Scaling Mode
S(1:0) Scaling Mode
00
No scaling
01
Scale down
10
Scale up
11
Reserved
Reserved
Sixteen-Bit Compatibilitity
Double Precision Multiply Mode
Loop Flag
DO-Forever Flag
Sixteenth-Bit Arithmetic
Reserved
Instruction Cache Enable
Arithmetic Saturation
Rounding Mode
Core Priority
CP(1:0) Core Priority
00
0 (lowest)
01
1
10
2
11
3 (highest)
23 22 21 20
19 18 17 16
CP1
CP0
RM
SM
CE
Extended Mode Register (MR)
Status Register (SR)
Read/Write
Reset = $C00300
MOTOROLA
Interrupt Mask
I(1:0) Exceptions Masked
00
None
01
IPL 0
10
IPL 0, 1
11
IPL 0, 1, 2
15 14 13 12 11 10 9
*
SA
FV
LF
DM
SC
0
Mode Register (MR)

Figure D-1 Status Register (SR)

DSP56309UM/D
Carry
Overßow
Zero
Negative
8
7
*
S1
S0
I1
I0
S
0
Condition Code Register (CCR)
*
= Reserved, Program as 0
Programming Reference
Date:
Programmer:
Sheet 1 of 5
6
5
4
3
2
1
L
E
U
N
Z
V
0
C
D-15

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