Figure 11-4 Jtag Id Register - Motorola DSP56309 User Manual

24-bit digital signal processor
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¥ Controlling the direction of bidirectional signals
¥ Controlling the output drive of tri-stateable output signals
For more details on the function and use of the EXTEST instruction, please refer to the
IEEE 1149.1 document.
11.3.2.2
SAMPLE/PRELOAD (B[3:0] = 0001)
The SAMPLE/PRELOAD instruction provides two separate functions. First, it provides
a means to obtain a snapshot of system data and control signals. The snapshot occurs on
the rising edge of TCK in the Capture-DR controller state. The data can be observed by
shifting it transparently through the BSR.
Note:
Because there is no internal synchronization between the JTAG clock (TCK)
and the system clock (CLK), the user must provide some form of external
synchronization to achieve meaningful results.
The second function of the SAMPLE/PRELOAD instruction is to initialize the BSR
output cells prior to selection of EXTEST. This initialization insures that known data
appears on the outputs when entering the EXTEST instruction.
11.3.2.3
IDCODE (B[3:0] = 0010)
The IDCODE instruction selects the ID register. This instruction is provided as a public
instruction to allow the manufacturer, part number, and version of a component to be
determined through the TAP. Figure 11-4 shows the ID register configuration.
31
28
27
Version
Information
0 0 1 0
0 0 0 1 1 0
One application of the ID register is to distinguish the manufacturer(s) of components on
a board when multiple sourcing is used. As more components emerge which conform to
the IEEE 1149.1 standard, it is desirable to allow for a system diagnostic controller unit to
blindly interrogate a board design in order to determine the type of each component in
MOTOROLA
22
21
Customer Part Number
Design
Core
Center
Number
Number
0 0 0 0 0

Figure 11-4 JTAG ID Register

DSP56309UM/D
17
16
12
11
Chip
Derivative
Number
0 0 0 1 0
0 0 0 0 0 0 0 1 1 1 0
JTAG Port
TAP Controller
1
0
Manufacturer
1
Identity
1
AA0718
11-9

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