Motorola DSP56309 User Manual page 258

Ð Toggle, mode 10: Output toggle, internal clock
These modes are described in detail below. Timer modes are selected by setting the
TC[3:0] bits in the TCSR. Table 9-2 on page 9-10 shows how the different timer modes
are selected by setting the bits in the TCSR. The table also shows the TIO signal direction
and the clock source for each timer mode. That table summarizes these modes, and the
following paragraphs describe these modes in detail.
Note: To insure proper operation, the TC[3:0] bits should be changed only when the
timer is disabled (i.e., when the TE bit in the TCSR is cleared).
9.4.1 Timing Modes
The following timing modes are provided:
¥ Timer GPIO
¥ Timer pulse
¥ Timer toggle
¥ Event counter
9.4.1.1 Timer GPIO (Mode 0)
Bit Settings
TC3 TC2 TC1
0 0 0
In this mode, the timer generates an internal interrupt when a counter value is reached
(if the timer compare interrupt is enabled).
Set the TE bit to clear the counter and enable the timer. Load the value the timer is to
count into the TCPR. The counter is loaded with the TLR value when the first timer clock
signal is received. The timer clock can be taken from either the DSP56309 clock divided
by two (CLK/2) or from the prescaler clock output. Each subsequent clock signal
increments the counter.
When the counter equals the TCPR value, the TCF bit in TCSR is set, and a compare
interrupt is generated if the TCIE bit is set. If the TRM bit in the TCSR is set, the counter
MOTOROLA
TC0 TIO Clock
0 GPIO Internal
DSP56309UM/D
Timer Operational Modes
Mode Characteristics
# Function
0 Timer
Triple Timer Module
Name
GPIO
9-17