Motorola DSP56309 User Manual page 12

24-bit digital signal processor
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7.4.2.4
CRB Serial Control Direction 2 (SCD2) Bit 4 . . . . . . . 7-16
7.4.2.5
CRB Clock Source Direction (SCKD) Bit 5 . . . . . . . . . 7-16
7.4.2.6
CRB Shift Direction (SHFD) Bit 6 . . . . . . . . . . . . . . . . 7-17
7.4.2.7
CRB Frame Sync Length FSL[1:0] Bits 7 and 8 . . . . . 7-17
7.4.2.8
CRB Frame Sync Relative Timing (FSR) Bit 9 . . . . . . 7-17
7.4.2.9
CRB Frame Sync Polarity (FSP) Bit 10. . . . . . . . . . . . 7-17
7.4.2.10
CRB Clock Polarity (CKP) Bit 11. . . . . . . . . . . . . . . . . 7-18
7.4.2.11
CRB Synchronous /Asynchronous (SYN) Bit 12. . . . . 7-18
7.4.2.12
CRB ESSI Mode Select (MOD) Bit 13 . . . . . . . . . . . . 7-20
7.4.2.13
Enabling, Disabling ESSI Data Transmission . . . . . . . 7-22
7.4.2.14
CRB ESSI Transmit 2 Enable (TE2) Bit 14 . . . . . . . . . 7-22
7.4.2.15
CRB ESSI Transmit 1 Enable (TE1) Bit 15 . . . . . . . . . 7-23
7.4.2.16
CRB ESSI Transmit 0 Enable (TE0) Bit 16 . . . . . . . . . 7-24
7.4.2.17
CRB ESSI Receive Enable (RE) Bit 17. . . . . . . . . . . . 7-26
7.4.2.18
CRB ESSI Transmit Interrupt Enable (TIE) Bit 18. . . . 7-26
7.4.2.19
CRB ESSI Receive Interrupt Enable (RIE) Bit 19 . . . . 7-26
7.4.2.20
Transmit Last Slot Interrupt Enable (TLIE) Bit 20 . . . . 7-26
7.4.2.21
Receive Last Slot Interrupt Enable (RLIE) Bit 21 . . . . 7-27
7.4.2.22
Transmit Exception Interrupt Enable (TEIE) Bit 22 . . . 7-27
7.4.2.23
Receive Exception Interrupt Enable (REIE) Bit 23 . . . 7-27
7.4.3
ESSI Status Register (SSISR). . . . . . . . . . . . . . . . . . . . . 7-27
7.4.3.1
SSISR Serial Input Flag 0 (IF0) Bit 0 . . . . . . . . . . . . . 7-28
7.4.3.2
SSISR Serial Input Flag 1 (IF1) Bit 1 . . . . . . . . . . . . . 7-28
7.4.3.3
SSISR Transmit Frame Sync Flag (TFS) Bit 2 . . . . . . 7-28
7.4.3.4
SSISR Receive Frame Sync Flag (RFS) Bit 3 . . . . . . 7-28
7.4.3.5
SSISR Transmitter Underrun Error Flag (TUE) Bit 4 . 7-29
7.4.3.6
SSISR Receiver Overrun Error Flag (ROE) Bit 5 . . . . 7-29
7.4.3.7
ESSI Transmit Data Register Empty (TDE) Bit 6 . . . . 7-29
7.4.3.8
ESSI Receive Data Register Full (RDF) Bit 7 . . . . . . . 7-30
7.4.4
ESSI Receive Shift Register . . . . . . . . . . . . . . . . . . . . . . 7-33
7.4.5
ESSI Receive Data Register (RX) . . . . . . . . . . . . . . . . . . 7-33
7.4.6
ESSI Transmit Shift Registers . . . . . . . . . . . . . . . . . . . . . 7-33
7.4.7
ESSI Transmit Data Registers (TX0-2) . . . . . . . . . . . . . . 7-34
7.4.8
ESSI Time Slot Register (TSR) . . . . . . . . . . . . . . . . . . . . 7-34
7.4.9
Transmit Slot Mask Registers (TSMA, TSMB) . . . . . . . . 7-34
7.4.10
Receive Slot Mask Registers (RSMA, RSMB). . . . . . . . . 7-35
MOTOROLA
DSP56309UM/D
ix

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