Figure 6-13 Command Vector Register (Cvr); Table 6-10 Init Command Effects - Motorola DSP56309 User Manual

The tÒype of initialization done when the INIT bit is set depends on the state of TREQ
and RREQ in the HI08. The INIT command, which is local to the HI08, can conveniently
configure the HI08 into the desired data transfer mode. The effect of the INIT command
is described in Table 6-10. When the host sets the INIT bit, the HI08 hardware executes
the INIT command. The interface hardware clears the INIT bit after the command has
been executed.
TREQ RREQ
0 0
0 1
1 0
1 1
6.6.2 Command Vector Register (CVR)
The host processor uses the CVR to cause the DSP56309 to execute an interrupt. The host
command feature is independent of any of the data transfer mechanisms in the HI08. It
can cause any of the 128 possible interrupt routines in the DSP core to be executed. This
register is illustrated in Figure 6-13.
6.6.2.1 CVR Host Vector (HV[6:0]) Bits 0Ð6
The seven HV bits select the host command interrupt address to be used by the host
command interrupt logic. When the host command interrupt is recognized by the DSP
interrupt control logic, the address of the interrupt routine taken is 2 ´ HV. The host can
write HC and HV in the same write cycle.
The host processor can select any of the 128 possible interrupt routine starting addresses
in the DSP by writing the interrupt routine address divided by two into the HV bits. This
means that the host processor can force any of the existing interrupt handlers (SSI, SCI,
MOTOROLA

Table 6-10 INIT Command Effects

After INIT Execution
INIT = 0
INIT = 0; RXDF = 0; HTDE = 1
INIT = 0; TXDE = 1; HRDF = 0
INIT = 0; RXDF = 0; HTDE = 1; TXDE = 1;
HRDF = 0
7 6 5
HC HV6 HV5 HV4

Figure 6-13 Command Vector Register (CVR)

DSP56309UM/D
HI08-External Host ProgrammerÕs Model
4 3 2 1
HV3 HV2 HV1
Host Interface (HI08)
Transfer Direction
Initialized
None
DSP to Host
Host to DSP
Host to/from DSP
0
HV0
AA0669
6-25