Table D-1 Internal I/O Memory Map - Motorola DSP56309 User Manual

Programming Reference
D.2 INTERNAL I/O MEMORY MAP
16-Bit
Peripheral
Address
IPR $FFFF
$FFFE
PLL $FFFD
OnCE $FFFC
BIU $FFFB
$FFFA
$FFF9
$FFF8
$FFF7
$FFF6
$FFF5
DMA $FFF4
$FFF3
$FFF2
$FFF1
$FFF0
DMA0 $FFEF
$FFEE
$FFED
$FFEC
D-4

Table D-1 Internal I/O Memory Map

24-Bit
Address
$FFFFFF Interrupt Priority Register Core (IPR-C)
$FFFFFE Interrupt Priority Register Peripheral (IPR-P)
$FFFFFD PLL Control Register (PCTL)
$FFFFFC OnCE GDB Register (OGDB)
$FFFFFB Bus Control Register (BCR)
$FFFFFA DRAM Control Register (DCR)
$FFFFF9 Address Attribute Register 0 (AAR0)
$FFFFF8 Address Attribute Register 1 (AAR1)
$FFFFF7 Address Attribute Register 2 (AAR2)
$FFFFF6 Address Attribute Register 3 (AAR3)
$FFFFF5 ID Register (IDR)
$FFFFF4 DMA Status Register (DSTR)
$FFFFF3 DMA Offset Register 0 (DOR0)
$FFFFF2 DMA Offset Register 1 (DOR1)
$FFFFF1 DMA Offset Register 2 (DOR2)
$FFFFF0 DMA Offset Register 3 (DOR3)
$FFFFEF DMA Source Address Register (DSR0)
$FFFFEE DMA Destination Address Register (DDR0)
$FFFFED DMA Counter (DCO0)
$FFFFEC DMA Control Register (DCR0)
DSP56309UM/D
Register Name
MOTOROLA