Core Configuration
DMA Request Sources
Table 4-4 Interrupt Source Priorities within an IPL (Continued)
Priority
Ñ
Lowest
4.5
DMA REQUEST SOURCES
The DMA request source bits (DRS[4:0]) in the DMA control/status registers) encode the
source of DMA requests used to trigger DMA transfers. The DMA request sources can
be internal peripherals or external devices requesting service through the IRQA, IRQB,
IRQC, or IRQD signals. Table 4-5 describes the meanings of the DRS bits.
DMA Request Source Bits
DRS4... DRS0
4-16
TIMER2 Overflow Interrupt
TIMER2 Compare Interrupt
Table 4-5 DMA Request Sources
00000
External (IRQA signal)
00001
External (IRQB signal)
00010
External (IRQC signal)
00011
External (IRQD signal)
00100
Transfer done from DMA channel 0
00101
Transfer done from DMA channel 1
00110
Transfer done from DMA channel 2
00111
Transfer done from DMA channel 3
01000
Transfer done from DMA channel 4
01001
Transfer done from DMA channel 5
01010
ESSI0 Receive Data (RDF0 = 1)
01011
ESSI0 Transmit Data (TDE0 = 1)
01100
ESSI1 Receive Data (RDF1 = 1)
DSP56309UM/D
Interrupt Source
Requesting Device
MOTOROLA