Interrupt Sources And Priorities - Motorola DSP56309 User Manual

24-bit digital signal processor
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4.3.7.3
Mode E: In 8051 Multiplexed Bus Mode
Mode
MODD
E
1
In mode E: boot from HI08 in 8051 multiplexed bus mode, the bootstrap program sets
the host interface to interface with the Intel
If the host processor sets host flag 0 (HF0) in the HCR while writing the initialization
program, the bootstrap program stops loading instructions, jumps to the starting
address specified, and executes the loaded program.
4.3.7.4
Mode F: In 68302/68360 Bus Mode
Mode
MODD
F
1
In mode F: boot from HI08 in 68302/68360 Bus mode, the bootstrap program sets the
host interface to interface with the Motorola 68302 or 68360 bus.
If the host processor sets host flag 0 (HF0) in the HCR while writing the initialization
program, the bootstrap program stops loading instructions, jumps to the starting
address specified, and executes the loaded program.
4.4

INTERRUPT SOURCES AND PRIORITIES

DSP56309 interrupt handling, like that of all DSP56300 family members, has been
optimized for DSP applications. Refer to Section 7 of the DSP56300
interrupt table is located in the 256 locations of program memory to which the vector
base address (VBA) register in the program control unit (PCU) points.
4.4.1
Interrupt Sources
Each interrupt is allocated two instructions in the table, so there are 128 table entries for
interrupt handling. Table 4-2 shows the table entry address for each interrupt source.
MOTOROLA
MODC
MODB
1
1
MODC
MODB
1
1
DSP56309UM/D
Interrupt Sources and Priorities
Reset
MODA
Vector
0
$FF0000
Ò
8051 bus.
Reset
MODA
Vector
1
$FF0000
Core Configuration
Description
HI08 Bootstrap in 8051
multiplexed bus
Description
HI08 Bootstrap in 68302 bus
Family Manual.
The
4-9

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