Motorola DSP56309 User Manual page 345

Equates
M_BNC EQU $F00
M_BAC EQU $FFF000
; control and status bits in SR
M_CP EQU $c00000
M_CA EQU 0
M_V EQU 1
M_Z EQU 2
M_N EQU 3
M_U EQU 4
M_E EQU 5
M_L EQU 6
M_S EQU 7
M_I0 EQU 8
M_I1 EQU 9
M_S0 EQU 10
M_S1 EQU 11
M_SC EQU 13
M_DM EQU 14
M_LF EQU 15
M_FV EQU 16
M_SA EQU 17
M_CE EQU 19
M_SM EQU 20
M_RM EQU 21
M_CP0 EQU 22
M_CP1 EQU 23
; control and status bits in OMR
M_CDP EQU $300
M_MA EQU 0
M_MB EQU 1
M_MC EQU 2
M_MD EQU 3
M_EBD EQU 4
M_SD EQU 6
M_MS EQU 7
M_CDP0 EQU 8
M_CDP1 EQU 9
M_BEN EQU 10
M_TAS EQU 11
M_BRT EQU 12
M_ATE EQU 15
M_XYS EQU 16
M_EUN EQU 17
M_EOV EQU 18
M_WRP EQU 19
M_SEN EQU 20
B-14
; Number of Address Bits to Compare Mask
; Address to Compare Bits Mask BAC(11:0)
; mask for CORE-DMA priority bits in SR
; Carry
; Overflow
; Zero
; Negative
; Unnormalized
; Extension
; Limit
; Scaling Bit
; Interrupt Mask Bit 0
; Interrupt Mask Bit 1
; Scaling Mode Bit 0
; Scaling Mode Bit 1
; Sixteen_Bit Compatibility
; Double Precision Multiply
; DO-Loop Flag
; DO-Forever Flag
; Sixteen-Bit Arithmetic
; Instruction Cache Enable
; Arithmetic Saturation
; Rounding Mode
; bit 0 of priority bits in SR
; bit 1 of priority bits in SR
; mask for CORE-DMA priority bits in OMR
; Operating Mode A
; Operating Mode B
; Operating Mode C
; Operating Mode D
; External Bus Disable bit in OMR
; Stop Delay
; Memory Switch bit in OMR
; bit 0 of priority bits in OMR
; bit 1 of priority bits in OMR
; Burst Enable
; TA Synchronize Select
; Bus Release Timing
; Address Tracing Enable bit in OMR.
; Stack Extension space select bit in OMR.
; Extended stack UNderflow flag in OMR.
; Extended stack OVerflow flag in OMR.
; Extended WRaP flag in OMR.
; Stack Extension Enable bit in OMR.
DSP56309UM/D MOTOROLA