Figure 7-15 Network Mode, External Frame Sync (8 Bit, 2 Words In Frame) - Motorola DSP56309 User Manual

Keeping the TE2 bit cleared until the start of the next frame causes the SC1 signal to act
as serial I/O flag from the start of the frame, in both normal and network mode. The
on-demand mode transmit enable sequence can be the same as normal mode, or the TE2
bit can be left enabled.
The TE2 bit is cleared by either a hardware RESET signal or a software RESET
instruction.
The setting of the TE2 bit does not affect the generation of frame sync or
Note:
output flags.
Frame SYNC
(FSL0 = 0, FSL1 = 0)
Frame SYNC
(FSL0 = 0, FSL1 = 1)
Data
Flags

Figure 7-15 Network Mode, External Frame Sync (8 Bit, 2 Words in Frame)

7.4.2.15 CRB ESSI Transmit 1 Enable (TE1) Bit 15
The TE1 bit enables the transfer of data from TX1 to transmit shift register 1. TE1 is
functional only when the ESSI is in synchronous mode and is ignored when the ESSI is
in asynchronous mode.
When TE1 is set and a frame sync is detected, the transmitter 1 is enabled for that frame.
When TE1 is cleared, transmitter 1 is disabled after completing transmission of data
currently in the ESSI transmit shift register. Any data present in TX1 is not transmitted. If
TE1 is cleared, data can be written to TX1; the TDE bit is cleared, but data is not
transferred to transmit shift register 1.
Keeping the TE1 bit cleared until the start of the next frame causes the SC0 signal to act
as serial I/O flag from the start of the frame, in both normal and network mode. The
transmit enable sequence for on-demand mode can be the same as for normal mode, or
the TE1 bit can be left enabled.
MOTOROLA
Enhanced Synchronous Serial Interface (ESSI)
SLOT 0 SLOT 1
DSP56309UM/D
ESSI Programming Model
SLOT 0 SLOT 1
AA1593
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