Triggering Or Video Gating Problems - Agilent Technologies 8564EC Service Manual

Triggering or Video Gating Problems

Refer to function block H of A3 Interface Assembly Schematic Diagram
(sheet 3 of 6) in the 8560 E-Series Spectrum Analyzer Component Level
Information.
The 1 MHz ADC clock provides synchronization in FREE RUN and
SINGLE triggering. LINE triggering synchronization originates on the
A6 power supply. Trigger MUX A3U613 selects between FREE RUN,
VIDEO, LINE, and EXTERNAL trigger sources. The trigger signal sets
the output of the HSCAN latch high. HBADC_CLK0 provides the
trigger signal for FREE RUN. The VIDEO TRIG signal must be at least
25 mV (0.25 divisions) peak-to-peak to trigger in video trigger mode.
The 3 MHz video bandwidth is not available when using video gating.
The trigger for Gated Video has two modes of operation, level mode and
edge mode. In the edge mode, positive-edge or negative-edge triggering
can be selected. Output 0 from pin 10 of A3U617 generates the gate
delay and output 1 from pin 13 of A3U617 generates the gate length.
The duration of these two time intervals is set using front-panel
softkeys under the
rear panel EXT/GATE TRIG INPUT (TTL > 10 kΩ).
1. Check that the trigger MUX is receiving the proper trigger source
2. If a trigger mode does not work, check that a trigger signal is present
Table 8-5 Trigger MUX Truth Table
FREE RUN
VIDEO
LINE
EXTERNAL
3. Check that the appropriate trigger MUX input signal is present at
4. To check the video trigger level DAC, connect the positive lead of a
5. Press
6. Press the STEP
Chapter 8
SWEEP
information by selecting each of the following trigger modes and
checking the TRIG_SOURCE0 and TRIG_SOURCE1 lines as
indicated in Table 8-5
at the appropriate trigger MUX input, as indicated in
Trigger Mode TRIG_SOURCE0
U613 pin 14
L
H
H
L
the trigger MUX output (A3U613 pin 7).
DVM to A3J400 pin 1 and the negative DVM lead to A3TP4.
and
TRIG VIDEO
key several times while noting the DVM reading
and position of the video trigger level on the screen.

Triggering or Video Gating Problems

key. The trigger input for Gated Video is the
below.
TRIG_SOURCE1
U613 pin 2
L
L
H
H
.
ADC/Interface Section
Table 8-5.
MUX Input Pin
Number U613
6
5
3
4
385