Cpu Access Profile List - D-Link xStack Reference Manual

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xStack DGS-3200 Series Layer 2 Managed Gigabit Ethernet Switch Web UI Reference Guide
rate is 640kbit/sec.) The user many select a value between 1 and 15625 or tick the No Limit check
box. The default setting is No Limit.
Time Range Tick the check box and enter the name of the Time Range settings that has been previously
Name configured in the Time Range Settings window. This will set specific times when this access rule
will be implemented on the Switch.
Counter Use the drop-down menu to specify if the Counter feature should be Enabled or Disabled.
Ports When a range of ports is to be configured, the Auto Assign check box MUST be ticked in the
Access ID field of this window. If not, the user will be presented with an error message and the
access rule will not be configured. Ticking the All Ports check box will denote all ports on the
Switch.
Click Apply to implement the changes.
To view the settings of a previously correctly configured rule, click the corresponding Show Details button on the Access Rule
List window to view the following window:
Figure 7 - 22. Access Rule Detail Information window for Packet Content

CPU Access Profile List

Due to a chipset limitation and needed extra switch security, the Switch incorporates CPU Interface filtering. This added feature
increases the running security of the Switch by enabling the user to create a list of access rules for packets destined for the
Switch's CPU interface. Employed similarly to the Access Profile feature previously mentioned, CPU interface filtering examines
Ethernet, IP and Packet Content Mask packet headers destined for the CPU and will either forward them or filter them, based on
the user's implementation. As an added feature for the CPU Filtering, the Switch allows the CPU filtering mechanism to be
enabled or disabled globally, permitting the user to create various lists of rules without immediately enabling them.
Creating an access profile for the CPU is divided into two basic parts. The first is to specify which part or parts of a frame the
Switch will examine, such as the MAC source address or the IP destination address. The second part is entering the criteria the
Switch will use to determine what to do with the frame. The entire process is described below.
Users may globally enable or disable the CPU Interface Filtering State mechanism by using the radio buttons to change the
running state. Choose Enabled to enable CPU packets to be scrutinized by the Switch and Disabled to disallow this scrutiny.
To view the following window, click ACL > CPU Access Profile List:
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