Interfaces; Transmit Fifo - Xilinx LogiCORE IP MAC v8.5 User Manual

Ug144 1-gigabit ethernet
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Interfaces

Transmit FIFO

Table A-1
client interface, see
Table A-1: Transmit FIFO Client Interface
tx_clk
tx_reset
tx_enable
tx_data[7:0]
tx_data_valid
tx_ack
tx_underrun
tx_collision
tx_retransmit
Table A-2
LocalLink interface see
Table A-2: Transmit FIFO LocalLink Interface
tx_ll_clock
tx_ll_reset
tx_ll_data_in[7:0]
tx_ll_sof_in_n
tx_ll_eof_in_n
tx_ll_src_rdy_in_n
tx_ll_dst_rdy_out_n
tx_fifo_status[3:0]
tx_overflow
128
-- DISCONTINUED PRODUCT --
describes the transmit FIFO client interface. For more information on the MAC
"Transmitting Outbound Frames," on page
Signal
Direction
Input
Input
Input
Output
Output
Input
Output
Input
Input
describes the transmit FIFO LocalLink interface. For more information on the
"Overview of LocalLink Interface," on page
Signal
Direction
Input
Input
Input
Input
Input
Input
Output
Output
Output
www.xilinx.com
Appendix A: Using the Client-Side FIFO
47.
Clock
Description
Domain
N/A
Transmit clock used by MAC.
tx_clk
Synchronous reset.
tx_clk
Clock enable for tx_clk. Tie to logic 1
when using GEMAC.
tx_clk
Data presented t o MAC for
transmission.
tx_clk
Valid signal for data.
tx_clk
Ack signal from MAC.
tx_clk
Underrun signal to MAC.
tx_clk
Collision indication from MAC. Tie
to logic 0 when using GEMAC.
tx_clk
Retransmit request from MAC. Tie to
logic 0 when using GEMAC.
Clock
Description
Domain
N/A
Write clock for LocalLink interface
tx_ll_clock
Synchronous reset
tx_ll_clock
Write data to be sent to transmitter
tx_ll_clock
Start of frame indicator
tx_ll_clock
End of frame indicator
tx_ll_clock
Source ready indicator
tx_ll_clock
Destination ready indicator
tx_ll_clock
FIFO memory status
tx_ll_clock
Overflow signal indicates when a
frame has been dropped in the FIFO
1-Gigabit Ethernet MAC v8.5 User Guide
130.
UG144 April 24, 2009

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