Transmitter Statistics Vector; Figure 5-10: Inter-Frame Gap Adjustment; Figure 5-11: Transmitter Statistic Vector Timing - Xilinx LogiCORE IP MAC v8.5 User Manual

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Transmitter Statistics Vector

The statistics for the transmitted frame are contained within the tx_statistic_vector.
The vector is driven synchronously by the transmitter clock, gtx_clk, following frame
transmission. The bit field definition for the vector is defined in
All bit fields, with the exception of byte valid, are valid only when
tx_statistic_valid is asserted
gtx_clk cycle.
50
-- DISCONTINUED PRODUCT --
gtx_clk
tx_data[7:0]
DA
tx_data_valid
tx_ack
tx_ifg_delay 0x0D
IFG ADJUST VALUE

Figure 5-10: Inter-Frame Gap Adjustment

Caution!
The statistic vectors in this release have been made compatible with the Tri-Mode
Ethernet MAC core. They are not backwards compatible with previous versions of the 1-Gigabit
Ethernet MAC core (see Table 5-5
tx_statistic_valid
tx_statistic_vector[31:0]

Figure 5-11: Transmitter Statistic Vector Timing

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Chapter 5: Using the Client Side Data Path
SA
(Figure 5-11). Byte valid is significant on every
for Transmitter Statistic Vector conversion details).
gtx_clk
1-Gigabit Ethernet MAC v8.5 User Guide
DA
Next IFG ADJUST VALUE
13 Idles inserted between the
end of frame and the preamble
field of the following frame
Table 5-4.
UG144 April 24, 2009