Output Generation - Xilinx LogiCORE IP MAC v8.5 User Manual

Output Generation

Table 3-1: XCO File Values and Default Values
component_name
physical_interface
management_interface
address_filter
no_of_address_table_
entries
Output Generation
The output files generated from the CORE Generator tool are placed in the CORE
Generator project directory. The list of output files includes the following items.
•
•
•
•
•
See the 1-Gigabit Ethernet MAC Getting Started Guide for more information about the CORE
Generator output files and for details on the HDL example design.
1-Gigabit Ethernet MAC v8.5 User Guide
UG144 April 24, 2009
-- DISCONTINUED PRODUCT --
Parameter
ASCII text starting with a letter and
based upon the following character
set: a..z, 0..9 and _
One of the following keywords: gmii,
rgmii
One of the following keywords: true,
false
One of the following keywords: true,
false
Integer in the range 0 - 4
Netlist file for the core
Supporting CORE Generator files
Release notes and documentation
Subdirectories containing an HDL example design
Scripts to run the core through the back-end tools and to simulate the core using either
Mentor Graphics ModelSim, Cadence IUS or Synopsys VCS simulators.
www.xilinx.com
XCO File Values
R
Default GUI Setting
gig_eth_mac_v8_5
gmii
true
true
4
33