Rgmii Inband Status Decoding Logic; Figure 7-10: Rgmii Inband Status Decoding Logic - Xilinx LogiCORE IP MAC v8.5 User Manual

Ug144 1-gigabit ethernet
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Implementing External RGMII

RGMII Inband Status Decoding Logic

The inband status decoding logic is common to all device families.
the decoding of RGMII inband status information. This information is received through
the RGMII interface between frames. The signal names and logic shown exactly match
those delivered with the example design when the RGMII is selected.
1-Gigabit Ethernet MAC Core
1-Gigabit Ethernet MAC v8.5 User Guide
UG144 April 24, 2009
-- DISCONTINUED PRODUCT --
gmii_rx_clk_bufg
gmii_rx_clk
gmii_rxd_reg[0]
gmii_rxd[0]
gmii_rxd_reg[1]
gmii_rxd[1]
gmii_rxd_reg[2]
gmii_rxd[2]
gmii_rxd_reg[3]
gmii_rxd[3]
gmii_rx_dv_reg
gmii_rx_dv
gmii_rx_er_reg
gmii_rx_er

Figure 7-10: RGMII Inband Status Decoding Logic

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Figure 7-10
illustrates
OBUF
inband_link_status
D
Q
OPAD
CE
OBUF
inband_clock_speed[0]
D
Q
OPAD
CE
OBUF
inband_clock_speed[1]
D
Q
OPAD
CE
OBUF
inband_duplex_status
D
Q
OPAD
CE
RGMII RECEIVER LOGIC
R
75

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