Gmii Receiver Logic; Spartan-3A Devices - Xilinx LogiCORE IP MAC v8.5 User Manual

Implementing External GMII

GMII Receiver Logic

Spartan-3, Spartan-3E, Spartan-3A and Virtex-4 Devices
A DCM must be used on the gmii_rx_clk clock path, as illustrated in
the input setup and hold requirements for GMII. This is performed by the example designs
delivered with the core (all signal names and logic match
may optionally be used in other families.
Phase-shifting may then be applied to the DCM to fine-tune the setup and hold times at the
GMII IOB input flip-flops. Fixed phase-shift is applied to the DCM with the example UCF
for the example design. See
1-Gigabit Ethernet MAC LogiCORE
Figure 7-2: External GMII Receiver Logic for Spartan-3, Spartan-3E, and Spartan-3A Devices
1-Gigabit Ethernet MAC v8.5 User Guide
UG144 April 24, 2009
-- DISCONTINUED PRODUCT --
Appendix C, "Calculating DCM Phase-Shifting."
gmii_rx_clk
gmii_rxd_reg[0]
gmii_rxd[0]
gmii_rx_dv_reg
gmii_rx_dv
gmii_rx_er_reg
gmii_rx_er
www.xilinx.com
Figure
BUFG
DCM
gmii_rx_clk0
CLK0 CLKIN
FB
gmii_rx_clk_bufg
Q
D
Q D
Q D
Figure 7-2, to meet
7-2). This DCM circuitry
IOB LOGIC
IBUFG
gmii_rx_clk
IPAD
IOB LOGIC
IBUF
gmii_rxd[0]
IPAD
IBUF
gmii_rx_dv
IPAD
IBUF
gmii_rx_er
IPAD
R
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