Implementing External Rgmii; Rgmii Transmitter Logic; Figure 7-4: External Rgmii Transmitter Logic - Xilinx LogiCORE IP MAC v8.5 User Manual

Ug144 1-gigabit ethernet
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Implementing External RGMII

The HDL example design delivered with the core implements an external RGMII when
RGMII is selected from the CORE Generator GUI (see
For more information about using the example design, see the 1-Gigabit Ethernet MAC
Getting Started Guide.

RGMII Transmitter Logic

Spartan-3, Spartan-3E, Spartan-3A and Spartan-3A DSP Devices
Figure 7-4
external RGMII in a Spartan-3 device. The signal names and logic precisely match those
delivered with the example design when the RGMII is selected. If other families are used,
equivalent primitives and logic specific to that family is used in the example design.
IOB LOGIC
IBUFG
gtx_clk
IPAD
1-Gigabit Ethernet MAC Core
gtx_clk
66
-- DISCONTINUED PRODUCT --
illustrates how to use the physical transmitter interface of the core to create an
BUFG
DCM
rgmii_tx_clk_bufg
CLK90
CLKIN
gtx_clk_bufg
CLK0
FB
gmii_txd_int[0]
gmii_txd[0]
gmii_txd_int[4]
gmii_txd[4]
gmii_tx_en_int
gmii_tx_en
gmii_tx_er_int
gmii_tx_er

Figure 7-4: External RGMII Transmitter Logic

www.xilinx.com
Chapter 7: Using the Physical Side Interface
Chapter 3, "Generating the
IOB LOGIC
FDDRRSE
'1'
D
Q
'0'
D
Q
IOB LOGIC
FDDRRSE
D
Q
D
Q
D
Q
D
Q
D
Q
FDDRRSE
D
Q
D
Q
D
Q
D
Q
D
Q
1-Gigabit Ethernet MAC v8.5 User Guide
Core").
OBUF
rgmii_txc
OPAD
OBUF
rgmii_txd[0]
OPAD
OBUF
rgmii_tx_ctl
OPAD
UG144 April 24, 2009

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