Vddq Generation And Typedet; Top Signal Layer - Intel VC820 - Desktop Board Motherboard Design Manual

Figure 2-30. Top Signal Layer
Ground Reference
It is strongly recommended that, at a minimum, the following critical signals be referenced to
ground from the MCH to an AGP connector (or to an AGP video controller if implemented as a
"down" solution) utilizing a minimum number of vias on each net; AD_STB0, AD_STB0#,
AD_STB1, AD_STB1#, SB_STB, SB_STB#, G_GTRY#, G_IRDY#, G_GNT# and ST[2:0].
In addition to the minimum signal set listed above, it is strongly recommended that half of all your
AGP signals be reference to ground depending on board layout. An ideal design would have the
complete AGP interface signal field referenced to ground.
The recommendations above are not specific to any particular PCB stackup, but are applied to all
®
Intel Chipset designs.
2.7.7

VDDQ Generation and TYPEDET#

AGP specifies two separate power planes (VCC and VDDQ). VCC is the core power for the
graphics controller. VCC is always 3.3V. VDDQ is the interface voltage. In AGP 1.0
implementations VDDQ was also 3.3V. For the designer developing an AGP 1.0 motherboard,
there is no distinction between VCC and VDDQ as both are tied to the 3.3V power plane on the
motherboard.
®
Intel 820 Chipset Design Guide
Must add six 0.01 uF ceramic 603 Type Capacitors
Layout/Routing Guidelines
2-37