Power Connector - Intel VC820 - Desktop Board Motherboard Design Manual

8 7

Power Connector

D
VCC5SBY
VCC3_3SBY
U20 14
VCC
9,29 SLP_S3# 5 6 SLP_S3
GND
7
SN74LVC06A
C
SN74LVC06A has 5V output tolerance.
VRM_PWRGD
4,28
B
Reset Button
SW2
JP12
A
8 7
6
VCC12- VCC3_3
ATX Connector
VCC5SBY
VCC12
J24
VCC5
11 1
3_3V11 3_3V1
12 2
-12V 3_3V2
13 3
GND13 GND3
14 4
PS_0N 5V4
ATX
15 5
GND15 GND5
16 6
GND16 5V6
17 7
GND17 GND7
18 8
-5V PW_OK
19 9
5V19 5VSB
20 10
5V20 12V
ATX_PWOK
R343
RSTBTN_SW
22
C335 C328
0.01UF 10UF
6
5 4
ITP Reset circuit. For debug only.
74LVC14A has 5V input tolerance.
VCC3_3SBY VCC3_3SBY VCC3_3SBY
14 14
U15 U15
1 2 3 4
1
POK_U1 POK_U2
2
7 7
74LVC14A 74LVC14A
SN74LVC08A
DBRESET#
4
330 ohm pullup to VCC3_3 located on CPU sheet.
R342
ATX_PWOK_R
0K
No stuff R342 when ITP is used.
220 ohm pullup to VCC3_3 is located on VRM sheet.
VCC3_3SBY
VCC3_3SBY
14
U15
R251
5 6
RSMRST_U RSMRST
22K
7
74LVC14A 74LVC14A
C266
1UF
Resume Reset circuitry
using a 22 msec delay
and Schmitt trigger logic.
5 4
3 2
U3
14
3
POK_U3
7
SN74LVC06A has 5V input tolerance.
VCC5SBY
U20
SN74LVC06A
U18
74LS132
14 VCC
9
8
10
PWROK_INV
7 GND
U20
SN74LVC06A
VCC3_3SBY
14
U15
9 8
RSMRST#
9,17
7
No stuff.
For test only
TITLE: INTEL(R) 820 CHIPSET CUSTOMER REFERENCE BOARD
POWER CONNECTOR
PCD PLATFORM DESIGN
R
1900 PRAIRIE CITY ROAD
FOLSOM, CALIFORNIA 95630
3 2
1
D
VCC2_5
VCC3_3SBY
C
14
VCC
1 2 PWRGOOD
4
GND
7
VCC3_3SBY
VCC3_3SBY
14
VCC
3 4 PWROK 7,9,16,29
GND
7
B
No stuff.
For test only
A
REV:
1.01
DRAWN BY: PROJECT:
LAST REVISED: SHEET:
11-18-1999_11:28 31 OF 36
1