Smbus/Alert Bus; Pci; Rtc; Pci Bus Layout Example - Intel VC820 - Desktop Board Motherboard Design Manual

2.18

SMBus/Alert Bus

The Alert on LAN* signals can be used as:
•
Alert on LAN* signals: 4.7 KΩ pullup resistors to 3.3VSB are required.
•
GPIOs:
•
Not Used:
If the SMBus is used only for the three SPD EEPROMs (one on each RIMM), both signals should
be pulled up with a 4.7 KΩ resistor to 3.3V.
2.19

PCI

The ICH provides a PCI Bus interface that is compliant with the PCI Local Bus Specification
Revision 2.2. The implementation is optimized for high-performance data streaming when the ICH
is acting as either the target or the initiator on the PCI bus. For more information on the PCI Bus
interface, refer to the PCI Local Bus Specification Revision 2.2.
The ICH supports six PCI Bus masters (excluding the ICH), by providing six REQ#/GNT# pairs.
In addition, the ICH supports two PC/PCI REQ#/GNT# pairs, one of which is multiplexed with a
PCI REQ#/GNT# pair.
Figure 2-55. PCI Bus Layout Example
2.20

RTC

The ICH contains a real time clock (RTC) with 256 bytes of battery backed SRAM. The internal
RTC module provides two key functions: keeping date and time, and storing system data in its
RAM when the system is powered down.
This section will present the recommended hookup for the RTC circuit for the ICH. This circuit is
not the same as the circuit used for the PIIX4.
®
Intel 820 Chipset Design Guide
Pullup resistors to 3.3VSB and the signals must be allowed to
change states on powerup (e.g., on power-up, the ICH drives
heartbeat messages until the BIOS programs these signals as
GPIOs). The value of the pullup resistors depends on the loading on
the GPIO signal.
4.7 KΩ pullup resistors to 3.3VSB are required.
ICH
Layout/Routing Guidelines
2-67