Validation; Test Load Vs. Actual System Load - Intel VC820 - Desktop Board Motherboard Design Manual

Advanced System Bus Design
3.2.6

Validation

Build systems and validate the design and simulation assumptions.
3.2.6.1 Measurements
Note that the AGTL+ specification for signal quality is at the pad of the component. The expected
method of determining the signal quality is to run analog simulations for the pin and the pad. Then
correlate the simulations at the pin against actual system measurements at the pin. Good correlation
at the pin leads to confidence that the simulation at the pad is accurate. Controlling the temperature
and voltage to correspond to the I/O buffer model extremes should enhance the correlation between
simulations and the actual system.
3.2.6.2 Flight Time Simulation
As defined in
difference between a signal crossing V
driver crossing V
in this guideline assume the actual system load is 50 Ω and is equal to the test load. While the DC
loading of the AGTL+ bus in a DP mode is closer to 25 Ω, AC loading is approximately 29 Ω since
the driver effectively "sees" a 56 Ω termination resistor in parallel with a 60 Ω transmission line on
the cartridge.
Figure 3-3. Test Load vs. Actual System Load
Figure 3-3
flip-flop represents the logic input and driver stage of a typical AGTL+ I/O buffer. T
specified at the driver pin output. T
time from the driver pad starting its transition to the time when the receiver's input pin sees a valid
data input. Since both timing numbers (T
the pad to the pin, it is necessary to subtract this time (T
3-14
Section 3.1, "Terminology and Definitions" on page
were it driving a test load. The timings in the tables and topologies discussed
REF
I/O Buffer
Vcc
SET
D
CLK
CLR
I/O Buffer
Vcc
SET
D
CLK
CLR
above shows the different configurations for T
FLIGHT-SYSTEM
at the input pin of the receiver, and the output pin of the
REF
V
TT
Driver
R Test Load
TEST
Pad
Driver
Q
Pin
Q
T
REF
T
CO
Actual
System
Load
Driver
Pad
Q
Q
T
FLIGHTSYSTEM
testing and flight time simulation. The
CO
is usually reported by a simulation tool as the
and T
CO FLIGHT-SYSTEM
) from the reported flight time to avoid
REF
3-1, flight time is the time
V
TT
R
TT
Receiver
Pin
timings are
CO
) include propagation time from
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