Intel VC820 - Desktop Board Motherboard Design Manual page 184

8 7
PCI Connectors
VCC3_3
2 and 3
VCC12- VCC5
PTCK
20,21
D
PIRQ#A
8,16,19,20,21,32
PIRQ#C
8,20,21,32
PRSNT#31
21
PRSNT#32
21
PCLK3
5
PREQ#2
8,32
AD31
AD29
C
AD27
AD25
C_BE#3
AD23
AD21
AD19
AD17
C_BE#2
IRDY#
8,16,20,21,32
DEVSEL#
8,16,20,21,32
PLOCK#
8,20,21,32
PERR#
8,16,20,21,32
B
SERR#
8,16,20,21,32
C_BE#1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
A
PU3_ACK64#
21
8,16,20 C_BE#[3:0]
8,16,20 AD[31:0]
8 7
6
VCC3_3
VCC5 VCC12
PCI Slot 2
J12
PCI3_CON
B1 A1 PTRST#
20,21
B2
A2
B3 A3 PTMS
20,21
B4 A4 PTDI
20,21
B5 A5
B6 A6 PIRQ#D
8,20,21,32
B7 A7 PIRQ#B
B8 A8 8,19,20,21,32
B9 A9
B10 A10 PCI_TEST for debug only
B11 A11 VCC3_3SBY
21
B12 A12
B13 A13 SERIRQ for debug only
B14 A14 8,12,32
B15 A15 PCIRST#
6,8,10,11,12,16,19,20,21,22
B16 A16
B17 A17 PGNT#2
8,32
B18 A18
B19 A19 PCI_PME#
8,16,19,20,21
B20 A20 AD30
B21 A21
B22 A22 AD28
B23 A23 AD26
B24 A24
B25 A25 AD24
B26 A26 R_AD23
21
B27 A27
B28 A28 AD22
B29 A29 AD20
B30 A30
B31 A31 AD18
B32 A32 AD16
B33 A33
B34 A34 FRAME#
8,16,20,21,32
B35 A35
B36 A36 TRDY#
8,16,20,21,32
B37 A37
B38 A38 STOP#
8,16,20,21,32
B39 A39
B40 A40 SDONEP3
21
B41 A41 SBOP3
21
B42 A42
B43 A43 PAR
8,16,20,21
B44 A44 AD15
B45 A45
B46 A46 AD13
B47 A47 AD11
B48 A48
B49 A49 AD9
B52 A52 C_BE#0
B53 A53
B54 A54 AD6
B55 A55 AD4
B56 A56
B57 A57 AD2
B58 A58 AD0
B59 A59
B60 A60 PU3_REQ64#
21
B61 A61
B62 A62
6
5 4
VCC3_3
VCC12- VCC5
PCI Slot 3
J11
PCI3_CON
B1 A1
B2
20,21 PTCK A2
B3 A3
B4 A4
B5 A5
B6 A6
PIRQ#D B7 A7
8,20,21,32
PIRQ#B B8 A8
8,19,20,21,32
PRSNT#41 B9 A9
21
PCI_TEST B10 A10
9
PRSNT#42 B11 A11 GNT#A_R
B12 A12
B13 A13
R255
SERIRQ SERIRQ_R B14 A14
0K
B15 A15
PCLK4 B16 A16
5
B17 A17
PREQ#5 B18 A18
8,32
B19 A19
AD31 B20 A20
AD29 B21 A21
B22 A22
AD27 B23 A23
AD25 B24 A24
B25 A25
C_BE#3 B26 A26
AD23 B27 A27
B28 A28
AD21 B29 A29
AD19 B30 A30
B31 A31
AD17 B32 A32
C_BE#2 B33 A33
B34 A34
IRDY# B35 A35
B36 A36
DEVSEL# B37 A37
B38 A38
PLOCK# B39 A39
PERR# B40 A40
B41 A41
SERR# B42 A42
B43 A43
C_BE#1 B44 A44
AD14 B45 A45
B46 A46
AD12 B47 A47
AD10 B48 A48
B49 A49
AD8 B52 A52
AD7 B53 A53
B54 A54
AD5 B55 A55
AD3 B56 A56
B57 A57
AD1 B58 A58
B59 A59
PU4_ACK64# B60 A60
21
B61 A61
B62 A62
5 4
3 2
VCC3_3
VCC5 VCC12
J9 must be furthest from the processor.
PTRST#
20,21
PTMS
20,21
PTDI
20,21
PIRQ#C
8,20,21,32
PIRQ#A
8,16,19,20,21,32
21
21
VCC3_3SBY
GNT#A for debug only 21
R99
GNT#A 8,32 21
0K
R107
0K
VAUX_JP
R110
PCIRST# REQ#A 8,32
0K
6,8,10,11,12,16,19,20,21,22
No Stuff R110.
PGNT#5
8,32 REQ#A for debug only
PCI_PME#
8,16,19,20,21
AD30
AD28
AD26
AD24
R_AD22
21
AD22
AD20
AD18
AD16
FRAME#
TRDY#
STOP#
SDONEP4
21
SBOP4
21
PAR
AD15
AD13
AD11
AD9
8,16
C_BE#0
8,16
AD6
AD4
AD2
AD0
PU4_REQ64#
21
TITLE: INTEL(R) 820 CHIPSET - FCPGA REFERENCE BOARD
PCI CONNECTORS 3 AND 4
PCD PLATFORM DESIGN
R
1900 PRAIRIE CITY ROAD
FOLSOM, CALIFORNIA 95630
3 2
1
D
VCC5
RP13
SDONEP3 1 8
SDONEP4 2 7
SBOP3 3 6
SBOP4 4 5
5.6K
C112 0.1UF
PRSNT#31
21
C121 0.1UF
PRSNT#32
21
C116 0.1UF
PRSNT#41
C
21
C126 0.1UF
PRSNT#42
21
VCC5
R174
PU3_ACK64#
21
2.7K
R175
PU3_REQ64#
21
2.7K
B
R172
PU4_ACK64#
21
2.7K
R173
PU4_REQ64#
21
2.7K
R118
AD23 R_AD23
21
100
R117
AD22 R_AD22
21
100
A
REV:
1.0
DRAWN BY: PROJECT:
LAST REVISED: SHEET:
11-9-1999_11:43 21 OF 37
1