Vref Generation For Agp 2.0 (2X And 4X); Agp Vddq Generation Example Circuit - Intel VC820 - Desktop Board Motherboard Design Manual

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Figure 2-31. AGP VDDQ Generation Example Circuit
TYPEDET#
2.7.8
V
Generation for AGP 2.0 (2X and 4X)
REF
V
generation for AGP 2.0 will be different depending on the AGP card type used. The 3.3V
REF
AGP cards generate V
down to V
GND at the MCH and graphics controller, 1.5V cards use source generated V
signal is generated at the graphics controller and sent to the MCH, and another V
the MCH and sent to the graphics controller). Refer to
Both the graphics controller and the MCH are required to generate V
the connector (1.5V add-in cards only). There are two pins defined on the AGP 2.0 universal
connector to allow this V
V
REF
V
REF
To preserve the common mode relationship between the V
routing of the two Vref signals must be matched in length to the strobe lines within 0.5 inches on
the motherboard and within 0.25 inches on the add-in card.
The voltage divider networks consists of AC and DC elements as shown in the figure.
The V
REF
benefit of the common mode power supply effects. However, the trace spacing around the V
signals must be a minimum of 25 mils to reduce cross-talk and maintain signal integrity.
®
Intel
820 Chipset Design Guide
+12V
O
1
2
R1
3
1 KΩ
4
C1
1 uF
locally (i.e., they have a resistor divider on the card that divides VDDQ
REF
) as shown in
Figure
2-32. To account for potential differences between VDDQ and
REF
passing. These pins are:
REF
GC
- Vref from the graphics controller to the chipset
CG
- Vref from the chipset to the graphics controller
divider network should be placed as close to the AGP interface as is practical to get the
+3.3V
O
U1
LT1575
5
SHDN
IPOS
6
VIN
INEG
7
GND
GATE
8
FB
COMP
C4
10 pF
R5
C5
47 uF
7.5 KΩ
Figure
2-32.
and data signals, it is important the
REF
Layout/Routing Guidelines
C2
47 uF
5 Ω
C3
220 uF
R2
R3
301 Ω
R4
1.21 KΩ
agp vddq generation vsd
(i.e., the V
REF
is generated at
REF
and distribute it through
REF
VDDQ
O
REF
REF
2-39

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