Omron SYSMAC CJ - REFERENCE MANUAL 01-2008 Reference Manual page 47

General Instruction Characteristics
Addressing Index Registers
Method
Directly MOVR(560) moves the PLC memory address of a
addressing word or bit to an Index Register (IR0 to IR15).
Index Registers
(MOVRW(561) moves the PLC memory address of
a timer or counter PV to an Index Register.)
Indirect Basic opera-
addressing with tion (no offset)
Index Registers
Constant offset The offset value (–2,048 to
DR offset
Auto-increment After the I/O memory address is
Auto-decre-
ment
8
Description
The word or bit at the I/O memory
address contained in IR@ is used
as the operand. Input a comma
before the Index Register to indi-
cate indirect addressing.
(The bit/word designation can be
determined by the instruction or
operand.)
+2,047) is added to the I/O mem-
ory address contained in IR@ and
the resulting address is used as
the operand.
(The offset is converted to binary
when the instruction is executed.)
The signed binary content of the
Data Register is added to the I/O
memory address contained in
IR@ and the resulting address is
used as the operand.
read from IR@, the content of the
Index Register is incremented by
one or two.
Increment by 1:
Increment by 2:
Note Index registers will be incre-
mented when the instruction
is executed even if an error
occurs and the Error Flag
turns ON.
The content of IR@ is decre-
mented by one or two and then
the I/O memory address in the
register is used as the operand.
Decrement by 1: ,– IR@
Decrement by 2: ,– –IR@
Note Index registers will be dec-
remented when the instruc-
tion is executed even if an
error occurs and the Error
Flag turns ON.
Note Make sure that the contents of index registers indicate valid I/O memory
addresses.
Example
IR0
IR2
,IR0
,IR1
+5 ,IR0
+31 ,IR1
DR0 ,IR0
DR0 ,IR1
,IR0 + +
,IR1 +
,R@+
,IR@++
, – – IR0
, – IR1
Section 1-1
Instruction example
MOVR 0010 IR0
Stores the PLC memory address
of CIO 0010 in IR0.
MOVR 000102 IR2
Stores the PLC memory address
of CIO 000102 in IR2.
LD ,IR0
Loads the status of the bit at the I/
O memory address contained in
IR0.
MOV #0001, IR1
Moves #0001 to the word at the I/
O memory address contained in
IR1.
LD +5 ,IR0
Adds 5 to the I/O memory
address contained in IR0 and
loads the status of the bit at that
address.
MOV #0001 +31 ,IR1
Adds 31 to the I/O memory
address contained in IR1 and
moves #0001 to the word at that
address.
LD DR0 ,IR0
Adds the content of DR0 to the I/
O memory address contained in
IR0 and loads the status of the bit
at that address.
MOV #0001 DR0 ,IR1
Adds the content of DR0 to the I/
O memory address contained in
IR1 and moves #0001 to the word
at that address.
LD ,IR0 + +
Loads the status of the bit at the I/
O memory address contained in
IR0 and then increments the reg-
ister by two.
MOV #0001 ,IR1 +
Moves #0001 to the word at the I/
O memory address contained in
IR1 and then increments the reg-
ister by one.
LD , – – IR0
Decrements the content of IR0 by
two and then loads the status of
the bit at that I/O memory
address.
MOV #0001 , – IR1
Decrements the content of IR0 by
one and then moves #0001 to the
word at that I/O memory address.