Double Floating To 16-Bit: Fixd(841) - Omron SYSMAC CJ - REFERENCE MANUAL 01-2008 Reference Manual

Sysmac cs/cj/one nsj series programmable controllers
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Double-precision Floating-point Instructions (CS1-H, CJ1-H, CJ1M, or CS1D Only)

3-16-1 DOUBLE FLOATING TO 16-BIT: FIXD(841)

Purpose
Ladder Symbol
Variations
Applicable Program Areas
Operand Specifications
658
Converts a double-precision (64-bit) floating-point value to 16-bit signed
binary data and places the result in the specified result word.
This instruction is supported by CS1-H, CJ1-H, CJ1M, and CS1D CPU Units
only.
FIXD(841)
S: First source word
S
D: Destination word
D
Variations
Executed Each Cycle for ON Condition
Executed Once for Upward Differentiation
Executed Once for Downward Differentiation Not supported.
Immediate Refreshing Specification
Block program areas
OK
OK
Area
CIO Area
Work Area
Holding Bit Area
Auxiliary Bit Area
Timer Area
Counter Area
DM Area
EM Area without bank
EM Area with bank
Indirect DM/EM
addresses in binary
Indirect DM/EM
addresses in BCD
Constants
Data Registers
Index Registers
Indirect addressing
using Index Registers
Step program areas
Subroutines
OK
S
CIO 0000 to CIO 6140
W000 to W508
H000 to H508
A000 to A956
T0000 to T4092
C0000 to C4092
D00000 to D32764
E00000 to E32764
En_00000 to En_32766
(n = 0 to C)
@ D00000 to @ D32767
@ E00000 to @ E32767
@ En_00000 to @ En_32767
(n = 0 to C)
*D00000 to *D32767
*E00000 to *E32767
*En_00000 to *En_32767
(n = 0 to C)
---
---
---
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
Section 3-16
FIXD(841)
@FIXD(841)
Not supported.
Interrupt tasks
OK
D
CIO 0000 to CIO 6143
W000 to W511
H000 to H511
A448 to A959
T0000 to T4095
C0000 to C4095
D00000 to D32767
E00000 to E32767
En_00000 to En_32767
(n = 0 to C)
DR0 to DR15

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