Move Timer/Counter Pv To Register: Movrw(561) - Omron SYSMAC CJ - REFERENCE MANUAL 01-2008 Reference Manual

Data Movement Instructions
Flags
Precautions
Example

3-8-15 MOVE TIMER/COUNTER PV TO REGISTER: MOVRW(561)

Purpose
Ladder Symbol
Variations
Applicable Program Areas
Operands
Name
Error Flag ER
Equals Flag =
Negative Flag N
Note In CS1-H, CJ1-H, CJ1M, and CS1D (for Single-CPU System) CPU Units,
these Flags are left unchanged.
In CS1 and CJ1 CPU Units, these Flags are turned OFF.
MOVR(560) cannot set the PLC memory addresses of timer/counter PVs.
Use MOVRW(561) to set the PLC memory addresses of timer/counter PVs.
The contents of an index register in an interrupt task is not predictable until it
is set. Be sure to set a register using MOVR(560) in an interrupt task before
using the register.
Any changes to the contents of an IR or DR made in an interrupt task will not
affect the contents of the register in a cyclic task.
When CIO 000000 is ON in the following example, MOVR(560) writes the
PLC memory address of CIO 0020 to IR0.
S: 0020
Sets the PLC memory address of the specified timer or counter's PV in the
specified Index Register. (Use MOVR(560) to set the PLC memory address of
a word, bit, or timer/counter Completion Flag in an Index Register.)
MOVRW(561)
S
D
Variations Executed Each Cycle for ON Condition
Executed Once for Upward Differentiation
Executed Once for Downward Differentiation Not supported
Immediate Refreshing Specification
Block program areas
OK
D: Destination
The destination must be an Index Register (IR0 to IR15).
Label
Unchanged (See note.)
Unchanged (See note.)
Unchanged (See note.)
Internal I/O memory address
1 4
D: IR0
S: Source (desired TC number)
D: Destination (Index Register)
Step program areas
OK
Section 3-8
Operation
Internal I/O memory
address of CIO 0020
1 4
MOVR(561)
@MOVR(561)
Not supported
Subroutines Interrupt tasks
OK OK
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