Double Floating To 32-Bit: Fixld(842) - Omron SYSMAC CJ - REFERENCE MANUAL 01-2008 Reference Manual

Double-precision Floating-point Instructions (CS1-H, CJ1-H, CJ1M, or CS1D Only)
Description
Flags

3-16-2 DOUBLE FLOATING TO 32-BIT: FIXLD(842)

Purpose
Ladder Symbol
Variations
Applicable Program Areas
Operand Specifications
FIXD(841) converts the integer portion of the double-precision (64-bit) float-
ing-point number in words S to S+3 (IEEE754-format) to 16-bit signed binary
data and places the result in D.
S+3CH S+2CH
DCH
Only the integer portion of the floating-point data is converted, and the fraction
portion is truncated. The integer portion of the floating-point data must be
within the range of –32,768 to 32,767.
Example conversions:
A floating-point value of 3.5 is converted to 3.
A floating-point value of –3.5 is converted to –3.
Name Label
Error Flag ER
Equals Flag =
Negative Flag N
Converts a double-precision (64-bit) floating-point value to 32-bit signed
binary data and places the result in the specified result words.
This instruction is supported by CS1-H, CJ1-H, CJ1M, and CS1D CPU Units
only.
FIXDL(842)
S: First source word
S
D: First destination word
D
Variations Executed Each Cycle for ON Condition
Executed Once for Upward Differentiation
Executed Once for Downward Differentiation Not supported.
Immediate Refreshing Specification
Block program areas
OK OK
Area
CIO Area
Work Area
S+1CH SCH
Floating-point data (64 bits)
Signed binary data (16 bits)
Operation
ON if the source data (S to S+3) is not a number (NaN).
ON if the integer portion of the source data (S to S+3) is
not within the range of –32,768 to 32,767.
OFF in all other cases.
ON if the result is 0000.
OFF in all other cases.
ON if bit 15 of the result is ON.
OFF in all other cases.
Step program areas Subroutines
OK
S
CIO 0000 to CIO 6140
W000 to W508
Section 3-16
FIXLD(842)
@FIXLD(842)
Not supported.
Interrupt tasks
OK
D
CIO 0000 to CIO 6142
W000 to W510
659