Omron SYSMAC CS/CJ Series Programming Manual
  1. Manuals
  2. Brands
  3. Omron Manuals
  4. Controller
  5. SYSMAC CS/CJ Series
  6. Programming manual
Omron SYSMAC CS/CJ Series Programming Manual

Omron SYSMAC CS/CJ Series Programming Manual

Hide thumbs
Table of Contents

Advertisement

Quick Links

Download this manual
Cat. No. W394-E1-03
SYSMAC CS/CJ Series
CS1G/H-CPU@@-EV1
CS1G/H-CPU@@H
CJ1G-CPU@@
CJ1G/H-CPU@@H
CJ1M-CPU@@
Programmable Controllers
PROGRAMMING MANUAL

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the SYSMAC CS/CJ Series and is the answer not in the manual?

Questions and answers

Subscribe to Our Youtube Channel

Related Manuals for Omron SYSMAC CS/CJ Series

Summary of Contents for Omron SYSMAC CS/CJ Series

  • Page 1 Cat. No. W394-E1-03 SYSMAC CS/CJ Series CS1G/H-CPU@@-EV1 CS1G/H-CPU@@H CJ1G-CPU@@ CJ1G/H-CPU@@H CJ1M-CPU@@ Programmable Controllers PROGRAMMING MANUAL...
  • Page 2 SYSMAC CS/CJ Series CS1G/H-CPU@@-EV1 CS1G/H-CPU@@H CJ1G-CPU@@ CJ1G/H-CPU@@H CJ1M-CPU@@ Programmable Controllers Programming Manual Revised July 2002...
  • Page 4 OMRON. No patent liability is assumed with respect to the use of the information contained herein. Moreover, because OMRON is con- stantly striving to improve its high-quality products, the information contained in this manual is subject to change without notice.
  • Page 6 TABLE OF CONTENTS PRECAUTIONS ........Intended Audience ............General Precautions .

  • Page 7: Table Of Contents

    TABLE OF CONTENTS 3-26 Clock Instructions ............3-27 Debugging Instructions .
  • Page 8 About this Manual: This manual describes the programming of the CS1G/H-CPU@@-EV1 and CJ1G/H/M-CPU@@ CPU Units for CS/CJ-series Programmable Controllers (PLCs) and includes the sections described on the following page. The CS Series and CJ Series are subdivided as shown in the following table. Unit CS Series CJ Series...
  • Page 9 CS1W-SCB21/41, CS1W-SCU21, CJ1W-SCU41 and Boards to perform serial communications Serial Communications Boards/Units Operation Manual with external devices, including the usage of stan- dard system protocols for OMRON products. SYSMAC WS02-PSTC1-E W344 Describes the use of the CX-Protocol to create CX-Protocol Operation Manual protocol macros as communications sequences to communicate with external devices.
  • Page 10 PRECAUTIONS This section provides general precautions for using the CS/CJ-series Programmable Controllers (PLCs) and related devices. The information contained in this section is important for the safe and reliable application of Programmable Controllers. You must read this section and understand the information contained before attempting to set up or operate a PLC system.

  • Page 11: Intended Audience

    It is extremely important that a PLC and all PLC Units be used for the speci- fied purpose and under the specified conditions, especially in applications that can directly or indirectly affect human life. You must consult with your OMRON representative before applying a PLC System to the above-mentioned appli- cations.
  • Page 12 Safety Precautions !WARNING Do not touch any of the terminals or terminal blocks while the power is being supplied. Doing so may result in electric shock. !WARNING Do not attempt to disassemble, repair, or modify any Units. Any attempt to do so may result in malfunction, fire, or electric shock.

  • Page 13: Operating Environment Precautions

    Operating Environment Precautions !Caution Tighten the screws on the terminal block of the AC Power Supply Unit to the torque specified in the operation manual. The loose screws may result in burning or malfunction. Operating Environment Precautions !Caution Do not operate the control system in the following locations: •...
  • Page 14 Application Precautions • The DeviceNet (CompoBus/D) output area for a DeviceNet (Compo- Bus/D) Master Unit (CIO 0050 to CIO 0099) overlaps with the I/O bit area (CIO 0000 to CIO 0319). Do not use automatic allocations for I/O in any system where allocations to the DeviceNet system will overlap with allocations to I/O Units.
  • Page 15 Application Precautions from a Programming Device or using the DATE(735) instruction. The clock will not start until the time has been set. • The user program and parameter area data in CS1-H, CJ1-H, or CJ1M CPU Units is backed up in the built-in flash memory. The BKUP indicator will light on the front of the CPU Unit when the backup operation is in progress.
  • Page 16 Application Precautions countermeasures in the program using the Battery Error Flag (A40204) to re-initialize data or take other actions if the Battery voltage drops. • When supplying power at 200 to 240 V AC with a CS-series PLC, always remove the metal jumper from the voltage selector terminals on the Power Supply Unit (except for Power Supply Units with wide-range specifica- tions).
  • Page 17 Application Precautions • Check the user program for proper execution before actually running it on the Unit. Not checking the program may result in an unexpected opera- tion. • Confirm that no adverse effect will occur in the system before attempting any of the following.

  • Page 18: Conformance To Ec Directives

    Concepts EMC Directives OMRON devices that comply with EC Directives also conform to the related EMC standards so that they can be more easily built into other devices or the overall machine. The actual products have been checked for conformity to EMC standards (see the following note).
  • Page 19 Conformance to EC Directives Relay Output Noise Reduction Methods The CS/CJ-series PLCs conforms to the Common Emission Standards (EN50081-2) of the EMC Directives. However, noise generated by relay out- put switching may not satisfy these Standards. In such a case, a noise filter must be connected to the load side or other appropriate countermeasures must be provided external to the PLC.
  • Page 20 Conformance to EC Directives Circuit Current Characteristic Required element The diode connected in parallel with The reversed dielectric strength value Diode method the load changes energy accumulated of the diode must be at least 10 times by the coil into a current, which then as large as the circuit voltage value.

  • Page 21: Conformance To Ec Directives

    Conformance to EC Directives xxii...

  • Page 22: Cpu Unit Operation

    SECTION 1 CPU Unit Operation This section describes the basic structure and operation of the CPU Unit. Initial Setup (CS1 CPU Units Only) ....... . Using the Internal Clock (CS1 CPU Units Only) .

  • Page 23: Initial Setup (Cs1 Cpu Units Only)

    Section 1-1 Initial Setup (CS1 CPU Units Only) Initial Setup (CS1 CPU Units Only) Battery Installation Before using a CS1CPU Unit, you must install the Battery Set in the CPU Unit using the following procedure. 1,2,3... 1. Insert a flat-blade screwdriver in the small gap at the bottom of the battery compartment and flip the cover upward to open it.
  • Page 24 Initial Setup (CS1 CPU Units Only) Section 1-1 2. Hold the Battery Set with the cable facing outward and insert it into the bat- tery compartment. Battery compartment 3. Connect the battery connector to the battery connector terminals. Connect the red wire to the top and the white wire to the bottom terminal. There are two sets of battery connector terminals;...
  • Page 25 Section 1-1 Initial Setup (CS1 CPU Units Only) 4. Fold in the cable and close the cover. Clearing Memory After installing the battery, clear memory using the memory clear operation to initialize the RAM inside the CPU Unit. Programming Console Use the following procedure from a Programming Console.

  • Page 26: Using The Internal Clock (Cs1 Cpu Units Only)

    Using the Internal Clock (CS1 CPU Units Only) Section 1-2 Using the Internal Clock (CS1 CPU Units Only) The internal clock of the CPU Unit is set to “00 year, 01 month, 01 day (00-01- 01), 00 hours, 00 minutes, 00 seconds (00:00:00), and Sunday (SUN)” when the Battery Set is mounted in the CS-series CPU Unit.

  • Page 27: Internal Structure Of The Cpu Unit

    Internal Structure of the CPU Unit Section 1-3 Internal Structure of the CPU Unit 1-3-1 Overview The following diagram shows the internal structure of the CPU Unit. CPU Unit The programm is divided Task 1 into tasks and the tasks are executed in order by Task 2 task number.

  • Page 28: Block Diagram Of Cpu Unit Memory

    Section 1-3 Internal Structure of the CPU Unit PLC Setup The PLC Setup is used to set various initial or other settings through software switches. DIP Switches DIP switches are used to set initial or other settings through hardware switches. Memory Cards Memory Cards are used as needed to store data such as programs, I/O mem- ory data, the PLC Setup, and I/O comments created by Programming...

  • Page 29: Operating Modes

    Operating Modes Section 1-4 CPU Unit Built-in RAM I/O memory area Flash Memory Drive 1: EM file memory (CS1-H, CJ1-H, or CJ1M (See note 2.) CPU Units only) Backup Auto- User program User program Battery written A newly mounted battery will be good up to five years at an ambient temperature of 25°C Drive 0: Memory card (flash memory)
  • Page 30 Operating Modes Section 1-4 • Registering the I/O table. • Changing PLC Setup and other settings. • Transferring and checking programs. • Force-setting and resetting bits to check wiring and bit allocation. In this mode, all cyclic and interrupt tasks are non-executing (INI), that is they stop.

  • Page 31: Initialization Of I/O Memory

    Operating Modes Section 1-4 1-4-2 Initialization of I/O Memory The following table shows which data areas will be cleared when the operat- ing mode is changed from PROGRAM mode to RUN/MONITOR mode or vice-versa. Mode change Non-held Areas Held Areas (Note 1) (Note 2) RUN/MONITOR →...

  • Page 32: Startup Mode

    Section 1-4 Operating Modes 1-4-3 Startup Mode Refer to the Operation Manual for details on the Startup Mode setting for the CPU Unit. Note With CJ1, CS1-H, CJ1-H, or CJ1M CPU Units, the CPU Unit will start in RUN Mode if a Programming Console is not connected. This differs from the default operation for a CS1 CPU Unit, which will start in PROGRAM Mode by default if a Programming Console is not connected.

  • Page 33: Programs And Tasks

    A. When execution of program B is completed, the rest of program A would be executed from the place where execution was interrupted. With earlier OMRON PLCs, one continuous program is formed from several continuous parts. The programs allocated to each task are single programs that terminate with an END instruction, just like the single program in earlier PLCs.
  • Page 34 Programs and Tasks Section 1-5 One feature of the cyclic tasks is that they can be enabled (executable status) and disabled (standby status) by the task control instructions. This means that several program components can be assembled as a task, and that only spe- cific programs (tasks) can then be executed as needed for the current product model or process being performed (program step switching).

  • Page 35: Description Of Tasks

    Section 1-6 Description of Tasks • A card that is activated will remain activated and will be read in subse- quent sequences. A card that is deactivated will remain deactivated and will be skipped until it is reactivated by another card. Earlier program: CS/CJ-series program: Like a scroll...
  • Page 36 Description of Tasks Section 1-6 Each program is allocated 1:1 to a task through individual program property settings set with the CX-Programmer. Cyclic task 0 Interrupt task 5 Executed in order starting from the lowest number. Cyclic task 1 Interrupt occurs Cyclic task 2 Note Condition Flags (ER, >, =, etc.) and instruction conditions (interlock ON, etc.) are cleared at the...
  • Page 37 Description of Tasks Section 1-6 Executable and Standby The TASK ON and TASK OFF instructions (TKON(820) and TKOF(821)) can be executed in one task to place another task in executable or standby status. Status Instructions in tasks that are on standby will not be executed, but their I/O sta- tus will be maintained.
  • Page 38 Section 1-6 Description of Tasks Example: Each Task Controlled by Another Task In this example, each task is controlled by another task. Program Program for task 0 Task 0 Task 1 Task 2 Program for task 1 Example: Task 1 is set to be executed at the start of operation unconditionally.
  • Page 39 Description of Tasks Section 1-6 Task Execution Time While a task is on standby, instructions in that task are not executed, so their OFF instruction execution time will not be added to the cycle time. Note From this standpoint, instructions in a task that is on standby are just like instructions in a jumped program section (JMP-JME).

  • Page 40: Programming

    SECTION 2 Programming This section basic information required to write, check, and input programs. Basic Concepts ..........2-1-1 Programs and Tasks .

  • Page 41: Basic Concepts

    Basic Concepts Section 2-1 Basic Concepts 2-1-1 Programs and Tasks CS/CJ-series PLCs execute ladder-diagram programs contained in tasks. The ladder-diagram program in each task ends with an END(001) instruction just as with conventional PLCs. Tasks are used to determine the order for executing the ladder-diagram pro- grams, as well as the conditions for executing interrupts.

  • Page 42: Basic Information On Instructions

    Section 2-1 Basic Concepts 2-1-2 Basic Information on Instructions Programs consist of instructions. The conceptual structure of the inputs to and outputs from an instruction is shown in the following diagram. Power flow (P.F., execution condition) Power flow (P.F., execution condition)* Instruction Instruction condition Instruction condition*...
  • Page 43 Section 2-1 Basic Concepts are reset (canceled) at the start of each task, i.e., they are reset when the task changes. The following instructions are used in pairs to set and cancel certain instruc- tion conditions. These paired instructions must be in the same task. Instruction Description Setting...

  • Page 44: Instruction Location And Execution Conditions

    Basic Concepts Section 2-1 Note Operands are also called the first operand, second operand, and so on, start- ing from the top of the instruction. First operand Second operand 2-1-3 Instruction Location and Execution Conditions The following table shows the possible locations for instructions. Instructions are grouped into those that do and those do not require execution conditions.

  • Page 45: Addressing I/O Memory Areas

    Section 2-1 Basic Concepts 2-1-4 Addressing I/O Memory Areas Bit Addresses @@@@ @@ Bit number (00 to 15) Indicates the word address Example: The address of bit 03 in word 0001 in the CIO Area would be as shown below. This address is given as “CIO 000103” in this manual. 0001 03 Bit number (03) Word address: 0001...

  • Page 46: Specifying Operands

    Basic Concepts Section 2-1 Example: The address of word 2000 in the current bank of the Extended Data Memory would be as follows: E00200 Word address The address of word 2000 in the bank 1 of the Extended Data Memory would be as follows: E1_00200 Word address...
  • Page 47 Basic Concepts Section 2-1 Operand Description Notation Application examples Specifying The offset from the beginning of the area is indirect DM/ specified. The contents of the address will be EM addresses treated as binary data (00000 to 32767) to specify the word address in Data Memory (DM) in Binary or Extended Data Memory (EM).
  • Page 48 Section 2-1 Basic Concepts Operand Description Notation Application examples Specifying MOV #0001 The offset from the beginning of the area is *D00200 indirect DM/ *D00200 specified. The contents of the address will be EM addresses treated as BCD data (0000 to 9999)to specify 0 1 0 0 Contents the word address in Data Memory (DM) or Ex-...
  • Page 49 Basic Concepts Section 2-1 Data Operand Data form Symbol Range Application example 16-bit con- All binary data or Unsigned binary #0000 to #FFFF stant a limited range of Signed decimal ± –32768 to binary data +32767 Unsigned deci- & (See Note.) &0 to &65535 All BCD data or a #0000 to #9999...
  • Page 50 Basic Concepts Section 2-1 ASCII Characters Bits 0 to 3 Bits 4 to 7 Binary 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 ‘ 0000 Space 0001 ” 0010 ” 0011 0100 0101 &...

  • Page 51: Data Formats

    Basic Concepts Section 2-1 2-1-6 Data Formats The following table shows the data formats that the CS/CJ Series can handle. Data type Data format Decimal 4-digit hexadecimal Unsigned 0 to 0000 to FFFF 15 14 13 12 11 10 9 binary 65535 Binary...
  • Page 52 Basic Concepts Section 2-1 Data type Data format Decimal 4-digit hexadecimal Single-pre- 31 30 29 20 19 18 17 cision floating- point deci- Sign of Exponent Mantissa mantissa Binary Sign Exponent Value = (−1) x 1.[Mantissa] x 2 Sign (bit 31) 1: negative or 0: positive Mantissa The 23 bits from bit 00 to bit 22 contain the mantissa,...
  • Page 53 Basic Concepts Section 2-1 1111 1111 1111 1111 True number 0000 0000 0001 0011 −) 1111 1111 1110 1100 0000 0000 0000 0001 Two's complement 1111 1111 1110 1101 Complements Generally the complement of base x refers to a number produced when all digits of a given number are subtracted from x –...
  • Page 54 Basic Concepts Section 2-1 SIGNED BINARY-TO-BCD: BCDS(471), and DOUBLE SIGNED BINARY-TO- BCD: BDSL(473). Refer to the CS/CJ-series Programmable Controllers Pro- gramming Manual (W340) for more information. Decimal Hexadecimal Binary 0000 0000 0001 0001 0010 0010 0011 0011 0100 0100 0101 0101 0110 0110...

  • Page 55: Instruction Variations

    Basic Concepts Section 2-1 2-1-7 Instruction Variations The following variations are available for instructions to differentiate executing conditions and to refresh data when the instruction is executed (immediate refresh). Variation Symbol Description Differentiation Instruction that differentiates when the execu- tion condition turns ON. OFF % Instruction that differentiates when the execu- tion condition turns OFF.
  • Page 56 Basic Concepts Section 2-1 • Input Instructions (Logical Starts and Intermediate Instructions): The instruction reads bit status, makes comparisons, tests bits, or perform other types of processing every cycle and will output an ON execution condition (power flow) when results switch from OFF to ON. The execu- tion condition will turn OFF the next cycle.

  • Page 57: I/O Instruction Timing

    Basic Concepts Section 2-1 FERENTIATE DOWN (DIFD) instructions, power flow differentiation UP and DOWN instructions as well as upwardly/ downwardly differentiated LOAD instructions (@LD/%LD). • Input Instructions (Logical Starts and Intermediate Instructions): The instruction reads bit status, makes comparisons, tests bits, or perform other types of processing every cycle and will output an OFF execution condition (power flow stops) when results switch from ON to OFF.
  • Page 58 Basic Concepts Section 2-1 (DIFD and % instructions) are set to OFF. This prevents differentiation outputs from being output unexpectedly at the start of operation. • An upwardly differentiated instruction (DIFU or @ instruction) will output ON only when the execution condition is ON and flag for the previous value is OFF.

  • Page 59: Refresh Timing

    Basic Concepts Section 2-1 2-1-10 Refresh Timing The following methods are used to refresh external I/O. • Cyclic refresh • Immediate refresh (! specified instruction, IORF instruction) Refer to the section on CPU Unit operation in the CS/CJ Series Operation Manual for details on the I/O refresh.
  • Page 60 Basic Concepts Section 2-1 • When a word operand is specified for an instruction, I/O will be refreshed for the 16 bits that are specified. • Inputs will be refreshed for input or source operand just before an instruc- tion is executed. •...
  • Page 61 Basic Concepts Section 2-1 Units Refreshed for An I/O REFRESH (IORF(097)) instruction that refreshes real I/O data in a specified word range is available as a special instruction. All or just a specified IORF(097) or DLNK(226) range of real I/O data can be refreshed during a cycle with this instruction. IORF can also be used to refresh words allocated to Special I/O Units.

  • Page 62: Program Capacity

    10K steps Note Memory capacity for CS/CJ-series PLCs is measured in steps, whereas memory capacity for previous OMRON PLCs, such as the C200HX/HG/HE and CV-series PLCs, was measured in words. Refer to the information at the end of10-5 Instruction Execution Times and Number of Steps in the Operation Manual for your PLC for guidelines on converting program capacities from previous OMRON PLCs.
  • Page 63 Section 2-1 Basic Concepts General Structure of the A ladder diagram consists of left and right bus bars, connecting lines, input Ladder Diagram bits, output bits, and special instructions. A program consists of one or more program runs. A program rung is a unit that can be partitioned when the bus is split horizontally.
  • Page 64 Basic Concepts Section 2-1 Basic Ladder Program Concepts 1,2,3... 1. The power flow in a program is from left to right. Power flows in rungs “a” and “b” as though diodes were inserted. Rungs must be changed to pro- duce operation that would be the same as ordinary circuits without a di- odes.
  • Page 65 Section 2-1 Basic Concepts 5. Output bits can also be used as input bits. 0002 0002 Restrictions 1,2,3... 1.A ladder program must be closed so that signals (power flow) will flow from the left bus bar to the right bus bar. A rung error will occur if the pro- gram is not closed (but the program can be executed).
  • Page 66 Basic Concepts Section 2-1 3. An input bit must always be inserted before and never after an output in- struction like an output bit. If it is inserted after an output instruction, then a location error will occur during a Programming Device program check. 0000 0000 0002...

  • Page 67: Inputting Mnemonics

    Basic Concepts Section 2-1 • Debugging programs will run much smoother if an END(001) instruction is inserted at various break points between sequence rungs and the END(001) instruction in the middle is deleted after the program is checked. Task (program) Task (program) 000000 000000...
  • Page 68 Section 2-1 Basic Concepts 1,2,3... 1. First separate the rung into small blocks (a) to (f). 0000 0000 0000 0000 0000 0000 0005 0010 0010 0000 0005 0000 0000 0000 0000 0010 0010 0000 0000 0000 0005...
  • Page 69 Basic Concepts Section 2-1 • Program the blocks from top to bottom and then from left to right. 0000 0000 0010 0010 LD 000000 LD 001000 AND 000001 AND 001001 OR LD 0005 0000 0000 OR 000500 LD 000004 AND 000005 0000 0000 0000...

  • Page 70: Program Examples

    Basic Concepts Section 2-1 2-1-14 Program Examples 1,2,3... 1. Parallel/Series Rungs 0000 0000 0000 0000 0002 Instruction Operands 000000 0002 000001 000200 000002 AND NOT 000003 A block B block 000200 Program the parallel instruction in the A block and then the B block. 2.
  • Page 71 Basic Concepts Section 2-1 3. Example of series connection in a series rung Instruction Operands A1 block B1 block 000000 0000 0000 0000 0000 0002 AND NOT 000001 LD NOT 000002 0000 0002 0002 0002 000003 OR LD 000004 000005 A2 block B2 block 000006...
  • Page 72 Basic Concepts Section 2-1 4. Complex Rungs 0000 0000 Instruction Operand 0000 0000 0002 000000 0000 0000 0000 0000 000001 000002 000003 0000 0000 OR LD The diagram above is based on the diagram below. AND LD 0000 0000 0000 000004 000005 OR LD...
  • Page 73 Basic Concepts Section 2-1 Instruction Operand Reset input 000000 0000 0000 H00000 000001 000002 0000 H00000 AND NOT 000003 10 sec Error input 0001 #0100 H00000 0002 0000 0001 T0001 0100 Error display T0001 H00000 000206 If a holding bit is in use, the ON/OFF status would be held in memory even if the power is turned OFF, and the error signal would still be in effect when power is turned back ON.
  • Page 74 Basic Concepts Section 2-1 5. Rungs Requiring Caution or Rewriting OR Instructions With an OR/OR NOT instruction, an OR is taken with current execution condition, i.e., the results of ladder logic up to the OR/OR NOT instruction. In the example at the left, an OR LD instruction will be needed if the rungs are programmed as shown without modification.

  • Page 75: Precautions

    Precautions Section 2-2 Rewrite the rungs on the left. They cannot be executed. The arrows show signal (power flow) flow when the rung consists of control relays. Precautions 2-2-1 Condition Flags Using Condition Flags Conditions flags are shared by all instructions, and will change during a cycle depending on results of executing individual instructions.
  • Page 76 Precautions Section 2-2 If the Condition Flag is connected directly to the left bus bar, instruction B will be executed based on the execution results of a previous rung if instruction A is not executed. Note Condition Flags are used by all instruction within a single program (task) but they are cleared when the task switches.
  • Page 77 Precautions Section 2-2 Example: The following example will move #0200 to D00200 if D00100 con- tains #0010 and move #0300 to D00300 if D00100 does not contain #0010. Incorrect Reflects CMP execution results. Reflects MOV execution results. The Equals Flag will turn ON if D00100 in the rung above contains #0010. #0200 will be moved to D00200 for instruction (1), but then the Equals Flag will be turned OFF because the #0200 source data is not 0000 Hex.
  • Page 78 Precautions Section 2-2 Using Execution Results from Differentiated Instructions With differentiated instructions, execution results for instructions are reflected in Condition Flags only when execution condition is met, and results for a pre- vious rung (rather than execution results for the differentiated instruction) will be reflected in Condition Flags in the next cycle.
  • Page 79 Precautions Section 2-2 When the ER Flag is ON, the status of other Condition Flags, such as the <, >, OF, and UF Flags, will not change and status of the = and N Flags will vary from instruction to instruction. Refer to the descriptions of individual instructions in the CS/CJ-series Pro- grammable Controllers Programming Manual (W340) for the conditions that will cause the ER Flag to turn ON.

  • Page 80: Special Program Sections

    Precautions Section 2-2 As an example, consider the results of executing a block transfer with XFER(070) if 20 words are specified for transfer beginning with W500. Here, the Work Area, which ends at W511, will be exceeded, but the instruction will be executed without turning ON the Error Flag.
  • Page 81 Precautions Section 2-2 Note Instructions that specify program areas cannot be used for programs in other tasks. Refer to 4-2-2 Task Instruction Limitations for details. Subroutines Place all the subroutines together just before the END(001) instruction in all programs but after programming other than subroutines. (Therefore, a subrou- tine cannot be placed in a step ladder, block program, FOR - NEXT, or JMP0 - JME0 section.) If a program other than a subroutine program is placed after a subroutine program (SBN to RET), that program will not be executed.
  • Page 82 Precautions Section 2-2 Instructions Not Available in Step Ladder Program Function Mnemonic Instruction Sections Sequence Control FOR(512), NEXT(513), and FOR, NEXT, and BREAK BREAK(514) LOOP END(001) IL(002) and ILC(003) INTERLOCK and INTER- LOCK CLEAR JMP(004) and JME(005) JUMP and JUMP END CJP(510) and CJPN(511) CONDITIONAL JUMP and CONDITIONAL JUMP NOT...
  • Page 83 Precautions Section 2-2 Instructions Not Available The following instructions cannot be placed in block program sections. in Block Program Sections Classification by Mnemonic Instruction Function Sequence Control FOR(512), NEXT(513), FOR, NEXT, and BREAK and BREAK(514) LOOP END(001) IL(002) and ILC(003) INTERLOCK and INTER- LOCK CLEAR JMP0(515) and JME0(516) MULTIPLE JUMP and...

  • Page 84: Checking Programs

    Checking Programs Section 2-3 Checking Programs CS/CJ-series programs can be checked at the following stages. • Input check during Programming Console input operations • Program check by CX-Programmer • Instruction check during execution • Fatal error check (program errors) during execution 2-3-1 Errors during Programming Device Input Programming Console...
  • Page 85 Checking Programs Section 2-3 Area Check Operand ranges Operand area ranges Operand data types Access check for read-only words Operand range checks, including the following. • Constants (#, &, +, –) • Control codes • Area boundary checks for multi-word operands •...

  • Page 86: Program Execution Check

    Checking Programs Section 2-3 Multi-word Operands Memory area boundaries are checked for multi-word operands for the pro- gram check as shown in the following table. CX-Programmer Programming Consoles The following functionality is provided by the CX-Programmer Checked when pro- for multi-word operands that exceed a memory area boundary. grams are input, i.e., operands that •...
  • Page 87 Checking Programs Section 2-3 Illegal Access Errors Illegal access errors indicate that the wrong area was accessed in one of the following ways when the address specifying the instruction operand was accessed. a) A read or write was executed for a parameter area. b) A write was executed in a memory area that is not mounted (see note).

  • Page 88: Checking Fatal Errors

    Checking Programs Section 2-3 In the rare even that this error does occur, it will be treated as a program error, operation will stop (fatal error), and the UM Overflow Flag (A29515) will turn 2-3-4 Checking Fatal Errors The following errors are fatal program errors and the CPU Unit will stop run- ning if one of these occurs.
  • Page 89 Checking Programs Section 2-3 Program error Description Related flags Indirect DM/EM BCD Error and Stop The value specified in an indirect DM/ AER Flag turns ON and the DM/EM Operation set for Instruction Errors in EM address in BCD mode is not BCD. Indirect BCD Error Flag (A29509) turns PLC Setup ON if Stop Operation set for Instruction...

  • Page 90: Instruction Functions

    SECTION 3 Instruction Functions This section outlines the instructions that can be used to write user programs. Sequence Input Instructions ........Sequence Output Instructions .

  • Page 91: Sequence Input Instructions

    Sequence Input Instructions Section 3-1 Sequence Input Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code LOAD Indicates a logical start and creates an ON/OFF execution condition based Bus bar on the ON/OFF status of the specified operand bit. Not required !@LD Starting !%LD...
  • Page 92 Section 3-1 Sequence Input Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code AND LOAD Logic block Logic block Takes a logical AND between logic blocks. AND LD Required Logic block A Logic block B AND LD Serial connection between logic block A and logic block B.

  • Page 93: Sequence Output Instructions

    Section 3-2 Sequence Output Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code BIT TEST LD TSTN(351), AND TSTN(351), and OR TSTN(351) are used in the pro- gram like LD NOT, AND NOT, and OR NOT; the execution condition is OFF AND TSTN AND TSTN(351) Required...
  • Page 94 Sequence Output Instructions Section 3-2 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DIFFERENTIATE Output DIFU(013) turns the designated bit ON for one cycle when the DIFU(013) Required execution condition goes from OFF to ON (rising edge). DIFU !DIFU Execution condition B: Bit Status of B One cycle...
  • Page 95 Section 3-2 Sequence Output Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SINGLE BIT SET SETB(532) turns ON the specified bit in the specified word when the execu- Output (CS1-H, CJ1-H, tion condition is ON. SETB(532) Required or CJ1M only) Unlike the SET instruction, SETB(532) can be used to set a bit in a DM or EM SETB word.

  • Page 96: Sequence Control Instructions

    Sequence Control Instructions Section 3-3 Sequence Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code Output Indicates the end of a program. END(001) Not required END(001) completes the execution of a program for that cycle. No instructions written after END(001) will be executed. Execution proceeds to the program with the next task number.
  • Page 97 Sequence Control Instructions Section 3-3 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code INTERLOCK Interlocks all outputs between IL(002) and ILC(003) when the execution condi- Output ILC(003) CLEAR tion for IL(002) is OFF. IL(002) and ILC(003) are normally used in pairs. Not required JUMP Output...
  • Page 98 Section 3-3 Sequence Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code MULTIPLE JUMP Output When the execution condition for JMP0(515) is OFF, all instructions JMP0(515) JMP0 Required from JMP0(515) to the next JME0(516) in the program are processed as NOP(000).

  • Page 99: Timer And Counter Instructions

    Timer and Counter Instructions Section 3-4 Timer and Counter Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code TIMER Output TIM operates a decrementing timer with units of 0.1-s. The setting TIM(BCD) Required range for the set value (SV) is 0 to 999.9 s. Timer input Timer PV N: Timer number...
  • Page 100 Timer and Counter Instructions Section 3-4 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code ACCUMULATIVE Output TTIM(087) operates an incrementing timer with units of 0.1-s. The Timer TTIM(087) TIMER Required input setting range for the set value (SV) is 0 to 999.9 s. TTIM (BCD) Reset...
  • Page 101 Timer and Counter Instructions Section 3-4 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code MULTI-OUTPUT Output MTIM(543) operates a 0.1-s incrementing timer with eight MTIM(543) TIMER Required independent SVs and Completion Flags. The setting range for the set MTIM value (SV) is 0 to 999.9 s. Timer PV (BCD) D1 bits...
  • Page 102 Timer and Counter Instructions Section 3-4 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code REVERSIBLE Output Incre- CNTR(012) operates a reversible counter. CNTR(012) COUNTER ment Required input CNTR Decre- Increment input ment (BCD) input Reset input Decrement input N: Counter number S: Set value Counter PV...

  • Page 103: Comparison Instructions

    Comparison Instructions Section 3-5 Comparison Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code Symbol Compari- Symbol comparison instructions (unsigned) compare two values son (Unsigned) Symbol & options LD: Not (constants and/or the contents of specified words) in 16-bit binary LD, AND, OR + =, required data and create an ON execution condition when the comparison...
  • Page 104 Comparison Instructions Section 3-5 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code Symbol Compari- : Comparison Symbol comparison instructions (double-word, signed) compare two values son (Double- (constants and/or the contents of specified double-word data) in signed 32-bit data 1 LD: Not word, signed) binary (8-digit hexadecimal) and create an ON execution condition when the required...
  • Page 105 Comparison Instructions Section 3-5 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code TABLE Output Compares the source data to the contents of 16 consecutive words TCMP(085) COMPARE Required and turns ON the corresponding bit in the result word when the TCMP contents of the words are equal.
  • Page 106 Comparison Instructions Section 3-5 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code AREA RANGE Compares the 16-bit unsigned binary value in CD (word contents or constant) to Output ZCP(088) COMPARE the range defined by LL and UL and outputs the results to the Arithmetic Flags in Required (CS1-H, CJ1-H, the Auxiliary Area.

  • Page 107: Data Movement Instructions

    Data Movement Instructions Section 3-6 Data Movement Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code MOVE Output Transfers a word of data to the specified word. MOV(021) Required @MOV Source word !MOV !@MOV S: Source D: Destination Bit status not changed.
  • Page 108 Data Movement Instructions Section 3-6 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code MOVE DIGIT Output Transfers the specified digit or digits. (Each digit is made up of 4 bits.) MOVD(083) MOVD Required @MOVD S: Source word or data C: Control word D: Destination word MULTIPLE BIT...
  • Page 109 Data Movement Instructions Section 3-6 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DOUBLE DATA Output Exchanges the contents of a pair of consecutive words with another XCGL(562) EXCHANGE Required pair of consecutive words. XCGL @XCGL E1+1 E2+1 E1: 1st exchange word E2: Second exchange word...

  • Page 110: Data Shift Instructions

    Data Shift Instructions Section 3-7 Data Shift Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SHIFT REGISTER Output Data Operates a shift register. input SFT(010) Required St+1, St+2 Shift input Reset input Status of data Lost input for each St: Starting word shift input E: End word...
  • Page 111 Data Shift Instructions Section 3-7 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DOUBLE SHIFT Output Shifts the contents of Wd and Wd +1 one bit to the left. ASLL(570) LEFT Required ASLL Wd+1 @ASLL Wd: Word ARITHMETIC Output Shifts the contents of Wd one bit to the right. SHIFT RIGHT ASR(026) Required...
  • Page 112 Data Shift Instructions Section 3-7 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code ROTATE RIGHT Output Shifts all Wd bits one bit to the right not including the Carry Flag (CY). RRNC(575) WITHOUT Required The contents of the rightmost bit of Wd shifts to the leftmost bit and to CARRY the Carry Flag (CY).
  • Page 113 Data Shift Instructions Section 3-7 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SHIFT N-BITS Output Shifts the specified 16 bits of word data to the left by the specified NASL(580) LEFT Required number of bits. NASL @NASL D: Shift word Shift n–bits C: Control word Contents of "a"...

  • Page 114: Increment/Decrement Instructions

    Increment/Decrement Instructions Section 3-8 Increment/Decrement Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code INCREMENT Output Increments the 4-digit hexadecimal content of the specified word by 1. BINARY ++(590) Required Wd: Word DOUBLE INCRE- Output Increments the 8-digit hexadecimal content of the specified words by 1. MENT BINARY ++L(591) Required...

  • Page 115: Symbol Math Instructions

    Symbol Math Instructions Section 3-9 Symbol Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SIGNED BINARY Output Adds 4-digit (single-word) hexadecimal data and/or constants. ADD WITHOUT +(400) Required CARRY (Signed binary) (Signed binary) CY will turn ON when there (Signed binary) Au: Augend word is a carry.
  • Page 116 Symbol Math Instructions Section 3-9 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DOUBLE BCD Output Adds 8-digit (double-word) BCD data and/or constants. +BL(405) ADD WITHOUT Required CARRY Au +1 (BCD) @+BL (BCD) Ad+1 CY will turn Au: 1st augend word (BCD) ON when there Ad: 1st addend word...
  • Page 117 Symbol Math Instructions Section 3-9 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DOUBLE Output Subtracts 8-digit (double-word) hexadecimal data and/or constants with – CL(413) SIGNED BINARY Required the Carry Flag (CY). WITH CARRY –CL (Signed binary) Mi+1 @–CL Su+1 (Signed binary) Mi: Minuend word –...
  • Page 118 Symbol Math Instructions Section 3-9 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SIGNED BINARY Output Multiplies 4-digit signed hexadecimal data and/or constants. *(420) MULTIPLY Required (Signed binary) × (Signed binary) Md: Multiplicand (Signed binary) R +1 word Mr: Multiplier word R: Result word DOUBLE...
  • Page 119 Symbol Math Instructions Section 3-9 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DOUBLE BCD Output Multiplies 8-digit (double-word) BCD data and/or constants. *BL(425) MULTIPLY Required (BCD) Md + 1 @*BL × (BCD) Mr + 1 Md: 1st multiplicand word (BCD) R + 3 R + 2...

  • Page 120: Conversion Instructions

    Conversion Instructions Section 3-10 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code BCD DIVIDE Output Divides 4-digit (single-word) BCD data and/or constants. /B(434) Required (BCD) ÷ (BCD) Dd: Dividend R +1 (BCD) word Dr: Divisor word Remainder Quotient R: Result word DOUBLE BCD Output Divides 8-digit (double-word) BCD data and/or constants.
  • Page 121 Conversion Instructions Section 3-10 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code 2’S COMPLE- Output Calculates the 2's complement of a word of hexadecimal data. NEG(160) MENT Required 2's complement @NEG (Complement + 1) S: Source word R: Result word DOUBLE 2’S Output Calculates the 2's complement of two words of hexadecimal data.
  • Page 122 Conversion Instructions Section 3-10 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DATA DECODER Output Reads the numerical value in the specified digit (or byte) in the source word, MLPX MLPX(076) Required turns ON the corresponding bit in the result word (or 16-word range), and @MLPX turns OFF all other bits in the result word (or 16-word range).
  • Page 123 Conversion Instructions Section 3-10 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DATA ENCODER Output FInds the location of the first or last ON bit within the source word (or 16-word DMPX DMPX(077) Required range), and writes that value to the specified digit (or byte) in the result word. @DMPX 16-to-4 bit conversion FInds leftmost bit...
  • Page 124 Conversion Instructions Section 3-10 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code ASCII TO HEX Output Converts up to 4 bytes of ASCII data in the source word to their hexadecimal HEX(162) Required equivalents and writes these digits in the specified destination word. @HEX C: 0021 First byte to convert...
  • Page 125 Conversion Instructions Section 3-10 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SIGNED BCD- Output Converts one word of signed BCD data to one word of signed binary data. BINS(470) TO-BINARY Required BINS @BINS Signed BCD format specified in C Signed BCD Signed binary C: Control word...

  • Page 126: Logic Instructions

    Logic Instructions Section 3-11 3-11 Logic Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code LOGICAL AND Output Takes the logical AND of corresponding bits in single words of word data ANDW(034) ANDW Required and/or constants. @ANDW → R : Input 1 : Input 2 R: Result word DOUBLE LOGI-...
  • Page 127 Logic Instructions Section 3-11 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DOUBLE Output Takes the logical exclusive OR of corresponding bits in double words of word XORL(612) EXCLUSIVE OR Required data and/or constants. XORL +1). (I +1) + (I +1).

  • Page 128: Special Math Instructions

    Special Math Instructions Section 3-12 3-12 Special Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code BINARY ROOT Output Computes the square root of the 32-bit binary content of the specified words ROTB(620) ROTB Required and outputs the integer portion of the result to the specified result word. @ROTB S: 1st source word...

  • Page 129: Floating-Point Math Instructions

    Floating-point Math Instructions Section 3-13 3-13 Floating-point Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code FLOATING TO Output Converts a 32-bit floating-point value to 16-bit signed binary data and places FIX(450) 16-BIT Required the result in the specified result word. @FIX Floating-point data (32 bits)
  • Page 130 Floating-point Math Instructions Section 3-13 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code FLOATING- Output Multiplies two 32-bit floating-point numbers and places the result in the F(456) POINT MULTIPLY Required specified result words. Multiplicand (floating- Md+1 point data, 32 bits) ×...
  • Page 131 Floating-point Math Instructions Section 3-13 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code TANGENT Output Calculates the tangent of a 32-bit floating-point number (in radians) and TAN(462) Required places the result in the specified result words. @TAN Source (32-bit floating-point data) S: 1st source word...
  • Page 132 Section 3-13 Floating-point Math Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code EXPONENT Output Calculates the natural (base e) exponential of a 32-bit floating-point number EXP(467) Required and places the result in the specified result words. @EXP Source (32-bit floating-point data) S: 1st source...

  • Page 133: Double-Precision Floating-Point Instructions (Cs1-H, Cj1-H, Or Cj1M Only)

    Section 3-14 Double-precision Floating-point Instructions (CS1-H, CJ1-H, or CJ1M Only) Instruction Symbol/Operand Function Location Mnemonic Execution condition Code FLOATING- Converts the specified single-precision floating-point data (32-bit decimal-point Output FSTR(448) POINT TO ASCII or exponential format) to text string data (ASCII) and outputs the result to the required (CS1-H, CJ1-H, destination word.
  • Page 134 Double-precision Floating-point Instructions (CS1-H, CJ1-H, or CJ1M Only) Section 3-14 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code 32-BIT BINARY Converts the specified 32-bit signed binary data to double-precision floating- Output DBLL(844) TO DOUBLE point data (64 bits) and outputs the result to the destination words. Required FLOATING DBLL...
  • Page 135 Section 3-14 Double-precision Floating-point Instructions (CS1-H, CJ1-H, or CJ1M Only) Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DOUBLE RADI- Converts the specified double-precision floating-point data (64 bits) from radi- Output DEGD(850) ANS TO ans to degrees and outputs the result to the result words. Required DEGREES DEGD...
  • Page 136 Double-precision Floating-point Instructions (CS1-H, CJ1-H, or CJ1M Only) Section 3-14 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DOUBLE Calculates the square root of the specified double-precision floating-point data Output SQRTD(857) SQUARE ROOT (64 bits) and outputs the result to the result words. Required SQRTD @SQRTD...

  • Page 137: Table Data Processing Instructions

    Table Data Processing Instructions Section 3-15 3-15 Table Data Processing Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SET STACK Output Defines a stack of the specified length beginning at the specified word and SSET(630) SSET Required initializes the words in the data region to all zeroes. @SSET PLC memory address...
  • Page 138 Section 3-15 Table Data Processing Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DIMENSION Output Defines a record table by declaring the length of each record and the number of DIM(631) RECORD TABLE Required records. Up to 16 record tables can be defined. @DIM Table number (N) Record...
  • Page 139 Table Data Processing Instructions Section 3-15 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SWAP BYTES Output Switches the leftmost and rightmost bytes in all of the words in the range. SWAP(637) SWAP Required @SWAP Byte position is swapped. N: Number of words R1: 1st word in range...
  • Page 140 Table Data Processing Instructions Section 3-15 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code STACK SIZE Counts the amount of stack data (number of words) in the specified stack. Output SNUM(638) READ required (CS1-H, CJ1-H, or CJ1M only) SNUM @SNUM TB: First stack address D: Destination...

  • Page 141: Data Control Instructions

    Data Control Instructions Section 3-16 3-16 Data Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code PID CONTROL Output Executes PID control according to the specified parameters. PID(190) Required Parameters (C to C+8) PV input (S) PID control S: Input word C: 1st parameter word Manipulated variable (D)
  • Page 142 Section 3-16 Data Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DEAD ZONE Output Adds the specified bias to input data and outputs the result. ZONE(682) CONTROL Required Output ZONE @ZONE Positive bias (C+1) Input S: Input word C: 1st limit word D: Output word Negative bias (C)
  • Page 143 Section 3-16 Data Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SCALING 3 Output Converts signed BCD data into signed binary data according to the SCL3(487) SCL3 Required specified linear function. An offset can be input in defining the linear @SCL3 function.

  • Page 144: Subroutine Instructions

    Subroutine Instructions Section 3-17 3-17 Subroutine Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SUBROUTINE Output Calls the subroutine with the specified subroutine number and executes that CALL SBS(091) Required program. Execution condition ON @SBS N: Subroutine number Main program Subroutine program (SBN(092) to...
  • Page 145 Section 3-17 Subroutine Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code GLOBAL SUB- Calls the subroutine with the specified subroutine number and executes that Output GSBS(750) ROUTINE CALL program. Not required (CS1-H, CJ1-H, or CJ1M only) GSBS N: Subroutine number GLOBAL SUB- Indicates the beginning of the subroutine program with the specified subroutine...

  • Page 146: Interrupt Control Instructions

    Interrupt Control Instructions Section 3-18 3-18 Interrupt Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SET INTERRUPT Output Sets up interrupt processing for I/O interrupts or scheduled interrupts. Both I/O MASK MSKS(690) Required interrupt tasks and scheduled interrupt tasks are masked (disabled) when the MSKS PC is first turned on.
  • Page 147 Interrupt Control Instructions Section 3-18 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DISABLE Output Disables execution of all interrupt tasks except the power OFF interrupt. DI(693) INTERRUPTS Required Disables execution of all interrupt tasks (except the power OFF interrupt). ENABLE Output Enables execution of all interrupt tasks that were disabled with DI(693).

  • Page 148: High-Speed Counter And Pulse Output Instructions (Cj1M-Cpu22/23 Only)

    Section 3-19 High-speed Counter and Pulse Output Instructions (CJ1M-CPU22/23 Only) 3-19 High-speed Counter and Pulse Output Instructions (CJ1M- CPU22/23 Only) Instruction Symbol/Operand Function Location Mnemonic Execution condition Code MODE CONTROL INI(880) is used to start and stop target value comparison, to change Output the present value (PV) of a high-speed counter, to change the PV of Required...

  • Page 149: Step Instructions

    Step Instructions Section 3-20 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code PULSE OUTPUT PLS2(887) is used to set the pulse frequency and acceleration/deceleration Output PLS2 rates, and to perform pulse output with acceleration/deceleration (with different PLS2 Required acceleration/deceleration rates). Only positioning is possible. @PLS2 P: Port specifier M: Output mode...

  • Page 150: Basic I/O Unit Instructions

    Basic I/O Unit Instructions Section 3-21 3-21 Basic I/O Unit Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code I/O REFRESH Output Refreshes the specified I/O words. IORF(097) IORF Required @IORF I/O bit area or I/O Unit or Special I/O Unit bit area Special I/O Unit St: Starting word I/O refreshing...

  • Page 151: Serial Communications Instructions

    Serial Communications Instructions Section 3-22 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code INTELLIGENT I/O Output Outputs the contents of the CPU Unit's I/O memory area to the Special I/O WRITE IOWR(223) Required Unit. IOWR @IOWR Unit number of Special I/O Unit C: Control data S: Transfer source and...

  • Page 152: Network Instructions

    Network Instructions Section 3-23 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code RECEIVE Reads the specified number of bytes of data from the RS-232C port built into Output RXD(235) the CPU Unit. Required @RXD D: 1st destination word C: Control word N: Number of bytes to store 0000 to 0100 hex...
  • Page 153 Network Instructions Section 3-23 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code NETWORK Output Requests data to be transmitted from a node in the network and receives the RECEIVE RECV(098) Required data. RECV @RECV Local node Source node S: 1st source word D: 1st destination word...

  • Page 154: File Memory Instructions

    File Memory Instructions Section 3-24 3-24 File Memory Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code READ DATA FILE Output Reads the specified data or amount of data from the specified data file in file FREAD(700) FREAD Required memory to the specified data area in the CPU Unit. @FREAD File specified Starting read address...

  • Page 155: Display Instructions

    Display Instructions Section 3-25 3-25 Display Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DISPLAY Reads the specified sixteen words of extended ASCII and displays the mes- Output MSG(046) MESSAGE sage on a Peripheral Device such as a Programming Console. Required @MSG N: Message...

  • Page 156: Debugging Instructions

    Debugging Instructions Section 3-27 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code HOURS TO Output Converts time data in hours/minutes/seconds format to an equivalent time in SECONDS SEC(065) Required seconds only. @SEC Minutes Seconds S: 1st source Hours word D: 1st destination word Seconds SECONDS TO...

  • Page 157: Failure Diagnosis Instructions

    Failure Diagnosis Instructions Section 3-28 3-28 Failure Diagnosis Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code FAILURE ALARM Output Generates or clears user-defined non-fatal errors. Non-fatal errors do not stop FAL(006) Required PC operation. @FAL FAL Error Flag ON Corresponding Executed FAL Number Execution of Flag ON...

  • Page 158: Other Instructions

    Other Instructions Section 3-29 3-29 Other Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code SET CARRY Sets the Carry Flag (CY). Output STC(040) Required @STC CLEAR CARRY Turns OFF the Carry Flag (CY). Output CLC(041) Required @CLC SELECT EM Changes the current EM bank.

  • Page 159: Block Programming Instructions

    Block Programming Instructions Section 3-30 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code DISABLE Disables peripheral servicing during program execution in Parallel Processing Output PERIPHERAL Mode or Peripheral Servicing Priority Mode. IOSP(287) Required SERVICING (CS1-H or CJ1-H only) IOSP @IOSP ENABLE Enables peripheral servicing that was disabled by IOSP(287) for program exe- Output...
  • Page 160 Block Programming Instructions Section 3-30 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code BLOCK Block program BPRS Pause and restart the specified block program from another block program. PROGRAM Required (812) RESTART BPRS N: Block program number BPRS(812) executed for block program n. Block program n.
  • Page 161 Block Programming Instructions Section 3-30 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code CONDITIONAL IF (802) Block program If the execution condition is ON, the instructions between IF(802) and BLOCK Required ELSE(803) will be executed and if the execution condition is OFF, the BRANCHING instructions between ELSE(803) and IEND(804) will be executed.
  • Page 162 Section 3-30 Block Programming Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code ONE CYCLE AND WAIT(805) Block program If the execution condition is ON for WAIT(805), the rest of the instruction in WAIT Required the block program will be skipped. WAIT Execution Execution...
  • Page 163 Section 3-30 Block Programming Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code COUNTER WAIT Block program Delays execution of the rest of the block program until the specified count CNTW(814) CNTW Required has been achieved. Execution will be continued from the next instruction after CNTW(814) when the counter counts out.
  • Page 164 Block Programming Instructions Section 3-30 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code LOOP Block program LOOP(809) designates the beginning of the loop program. LOOP Required Execution Execution Execution Execution condition condition condition condition Execution condition Loop repeated LEND LEND(810) LEND(810) or LEND(810) NOT specifies the end of the loop.

  • Page 165: Text String Processing Instructions

    Section 3-31 Text String Processing Instructions 3-31 Text String Processing Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code MOV STRING Output Transfers a text string. MOV$(664) MOV$ Required @MOV$ S: 1st source word D: 1st destination word CONCATENATE Output Links one text string to another text string.
  • Page 166 Text String Processing Instructions Section 3-31 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code FIND IN STRING Output Finds a designated text string from within a text string. FIND$(660) FIND Required Found data @FIND$ → → → S1: Source text string first word S2: Found text string first word...
  • Page 167 Text String Processing Instructions Section 3-31 Instruction Symbol/Operand Function Location Mnemonic Execution condition Code EXCHANGE Output Replaces a designated text string with another designated text string. XCHG$(665) STRING Required XCHG$ @XCHG$ Ex1: 1st exchange word 1 Ex2: 1st exchange word 2 CLEAR STRING Output Clears an entire te xt str ing with NUL (00 hex).

  • Page 168: Task Control Instructions

    Section 3-32 Task Control Instructions 3-32 Task Control Instructions Instruction Symbol/Operand Function Location Mnemonic Execution condition Code TASK ON Output Makes the specified task executable. TKON(820) TKON Required @TKON The specified task's task number The specified task's task number is higher than the local task's task is lower than the local task's task N: Task number number (m<n).
  • Page 169 Task Control Instructions Section 3-32...

  • Page 170: Tasks

    SECTION 4 Tasks This section describes the operation of tasks. Task Features..........4-1-1 Overview.

  • Page 171: Task Features

    Task Features Section 4-1 Task Features 4-1-1 Overview CS/CJ-series control operations can be divided by functions, controlled devices, processes, developers, or any other criteria and each operation can be programmed in a separate unit called a “task.” Using tasks provides the fol- lowing advantages: 1,2,3...

  • Page 172: Tasks And Programs

    Task Features Section 4-1 6. Easily understood user programs. Programs are structured in blocks that make the programs much simpler to understand for sections that would conventionally be handled with in- structions like jump. Task C Task A (Program A) Start task A Start task B Task B...

  • Page 173: Basic Cpu Unit Operation

    Task Features Section 4-1 4-1-3 Basic CPU Unit Operation The CPU Unit will execute cyclic tasks (including extra cyclic tasks, CS1-H, CJ1-H, or CJ1M CPU Unit only) starting at the lowest number. It will also inter- rupt cyclic task execution to execute an interrupt task if an interrupt occurs. Cyclic task 0 Interrupt task 5 Executed in order starting...
  • Page 174 Task Features Section 4-1 Cyclic task 0 Executed in order starting at lowest number of the cyclic tasks. Normal cyclic tasks Cyclic task n Extra cyclic task 0 Executed in order starting at lowest number of the extra cyclic tasks. Extra cyclic tasks Extra cyclic task m I/O refresh...

  • Page 175: Types Of Tasks

    Task Features Section 4-1 4-1-4 Types of Tasks Tasks are broadly classified as either cyclic tasks or interrupt tasks. Interrupt tasks are further divided into power OFF, scheduled, I/O (CS Series only), and external interrupt tasks (CS Series only). Interrupt tasks can also be executed as extra cyclic tasks.
  • Page 176 Task Features Section 4-1 mounted elsewhere cannot be used to request execution of I/O interrupt tasks. I/O interrupts are not supported by CJ1 CPU Units. External Interrupt Tasks An external interrupt task will be executed when requested by an Special I/O Unit, CPU Bus Unit, or Inner Board (CS Series only) user program.

  • Page 177: Task Execution Conditions And Settings

    Task Features Section 4-1 4. The CJ1 CPU Units do not support I/O interrupt and external interrupt tasks. 4-1-5 Task Execution Conditions and Settings The following table describes task execution conditions, related settings, and status. Task Execution condition Related Setting Cyclic tasks 0 to 31 Executed once each cycle if...

  • Page 178: Cyclic Task Status

    Task Features Section 4-1 ated for CJ1M CPU Units), but these tasks can be edited if they were already created with CX-Programmer. 4-1-6 Cyclic Task Status This section describes cyclic task status, including extra cyclic tasks (sup- ported by CS1-H, CJ1-H, or CJ1M CPU Units only). Cyclic tasks always have one of four statuses: Disabled, READY, RUN (exe- cutable), and standby (WAIT).

  • Page 179: Using Tasks

    Using Tasks Section 4-2 2. Activation at the start of operation is possible for normal cyclic tasks only. It is not possible for extra cyclic tasks. Standby status functions exactly the same way as a jump (JMP-JME). Output status for the Standby task will be maintained. Standby status Jump Instructions will not be executed in Standby status, so instruction execution...
  • Page 180 Using Tasks Section 4-2 The TASK ON and TASK OFF instructions can be used to change any cyclic task between READY or Standby status at any time. A cyclic task that is in READY status will maintain that status in subsequent cycles, and a cyclic task that is in Standby status will maintain that status in subsequent cycles.
  • Page 181 Using Tasks Section 4-2 Tasks and the Execution Cycle A cyclic task (including an extra cyclic task) that is in READY status will main- tain that status in subsequent cycles. READY sta- tus at the Cyclic task 1 Cyclic task 1 READY status start of op- eration...
  • Page 182 Using Tasks Section 4-2 If task m places task n in Standby status and m > n, will go to Standby status the next cycle. Example: If task 5 places task 2 in Standby status, task 2 will go to Standby status the next cycle.

  • Page 183: Task Instruction Limitations

    Using Tasks Section 4-2 Relationship of Tasks to All Condition Flags will be cleared before execution of each task. Therefore Condition Flag status at the end of task 1 cannot be read in task 2. With a Condition Flags CS1-H, CJ1-H, or CJ1M CPU Unit, however, CCS(282) and CCL(283) can be used to read Condition Flag status from another part of the program, e.g., from another task.

  • Page 184: Flags Related To Tasks

    Using Tasks Section 4-2 WORK SEND: SEND(090), NETWORK RECEIVE: RECV(098), DELIVER COMMAND: CMND(490), PROTOCOL MACRO: PMCR(260). 4-2-3 Flags Related to Tasks Flags Related to Cyclic Tasks The following flag work only for normal cyclic tasks. They do not work for extra cyclic tasks.
  • Page 185 Using Tasks Section 4-2 Task Start Flag (A20014, The Task Start Flag can be used to perform initialization processing each time the task cycle is started. The Task Start Flag turns OF whenever cycle task CS1-H, CJ1-H, or CJ1M CPU Units only) status changes from Disabled (INI) or Standby (WAIT) status to READY status (whereas the Initial Task Execution Flag turns ON only when status changes from Disabled (INI) to READY).
  • Page 186 Using Tasks Section 4-2 From Program Mode to Operating or Monitor Mode. Cyclic task 0 with the startup at the start of operation attribute (overall control task) Cyclic task 1 Cyclic task 2 Cyclic task 3 Tasks Separated by Function Tasks Separated by Controlled Section A-section control Conveyor task...

  • Page 187: Designing Tasks

    Using Tasks Section 4-2 4-2-4 Designing Tasks We recommend the following guidelines for designing tasks. 1,2,3... 1. Use the following standards to study separating tasks. a) Summarize specific conditions for execution and non-execution. b) Summarize the presence or absence of external I/O. c) Summarize functions.

  • Page 188: Global Subroutines

    Using Tasks Section 4-2 8. Assign I/O memory into memory shared by tasks and memory used only for individual tasks, and then group I/O memory used only for individual tasks by task. Relationship of Tasks to Up to 128 block programs can be created in the tasks. This is the total number Block Programs for all tasks.

  • Page 189: Interrupt Tasks

    Interrupt Tasks Section 4-3 Cyclic task (including extra cyclic task) Interrupt task 0 GSBS Call GSBN n = 0 to 1,023 Global subroutine Exe- (shared subroutine cution used for standard programming_ Return GRET Cyclic task (including Multiple tasks extra cyclic task) Call GSBS Return...
  • Page 190 Interrupt Tasks Section 4-3 CPU Unit Interrupt Pro- gram Power OFF External Interrupts (CS An external interrupt task will be executed when an interrupt is requested by Series Only) an Special I/O Unit, CPU Bus Unit, or Inner Board (CS Series only). The Spe- cial I/O Unit or CJ Bus Unit, however, must be on the CPU Rack to request execution of an external interrupt task.
  • Page 191 Interrupt Tasks Section 4-3 3. CJ1 CPU Units do not support I/O interrupt and external interrupt tasks. I/O Interrupt Tasks: Tasks 100 to 131 I/O interrupt tasks are disabled by default when cyclic task execution is started. To enable I/O interrupts, execute the MSKS (SET INTERRUPT MASK) instruction in a cyclic task for the interrupt number for Interrupt Input Unit.
  • Page 192 Section 4-3 Interrupt Tasks Interrupt Input Unit Numbers, Input Interrupt Input Unit No. Input No. I/O interrupt task Numbers, and I/O (See note.) Interrupt Task Numbers 0 to 15 100 to 115 0 to 15 116 to 131 Note For CS-series PLCs, Interrupt Input Unit numbers are in order from 0 to 1 starting on the left side of the CPU Rack.
  • Page 193 Section 4-3 Interrupt Tasks Example: The following examples shows executed scheduled interrupt task 2 every second. Cyclic task Interrupt number 4 will be executed at an interrupt interval of 0064 Hex. &100 Scheduled interrupt time unit in PLC Setup = 10 ms (0.01 s) Every second Cyclic task Interrupt...
  • Page 194 Interrupt Tasks Section 4-3 Example: If the power OFF detection delay time is set to 4 ms in PLC Setup, then execution time must be less than 10 minus 4 ms, or 6 ms. Power OFF interrupt task Less than 10 ms minus the power OFF detection delay time The default setting is 10 ms max.
  • Page 195 Section 4-3 Interrupt Tasks Power OFF Interrupt Task Execution Cyclic task Power Power OFF interrupt task 1 Power OFF interrupt task ON/OFF setting in PC Setup: ON CPU reset PLC Setup Settings for Power OFF Interrupt Task (Task Number: 1) Address Name Description...

  • Page 196: Interrupt Task Priority

    Interrupt Tasks Section 4-3 number), the Board will request execution of an external interrupt task in the CPU Unit after it receives data from its serial port and writes that data into the CPU Unit’s I/O memory. Specifies exter- CPU Unit Serial Communications Board nal interrupt task number and re-...

  • Page 197: Interrupt Task Flags And Words

    Interrupt Tasks Section 4-3 Interrupt during Interrupt Task Execution If an interrupt occurs while another interrupt task is being executed, the task for the interrupt will not be executed until the original interrupt finishes execut- ing. Cyclic task Interrupt task A Interrupt during Interrupt task B execution...

  • Page 198: Application Precautions

    Section 4-3 Interrupt Tasks Interrupt Task with Maximum Processing Time (A441) The interrupt task number with maximum processing time is stored in binary data. Here, 8000 to 80FF Hex correspond to task numbers 00 to FF Hex. A44115 will turn ON when the first interrupt occurs after the start of operation. The maximum processing time for subsequent interrupt tasks will be stored in the rightmost two digits in hexadecimal and will be cleared at the start of oper- ation.
  • Page 199 Interrupt Tasks Section 4-3 offending interrupt task number will be stored in A426 (Interrupt Task Error, Task Number). The CPU Unit however will continue to operate. C200H Special I/O Unit Incorrect Use Correct Use Interrupt task Interrupt task Up to 10 ms 10 ms or Master SYSMAC longer...
  • Page 200 Interrupt Tasks Section 4-3 Related Auxiliary Area Flags/Words Name Address Description Interrupt Task Error A40213 Turns ON if an interrupt task executes for more than 10 ms during Flag C200H Special I/O Unit or SYSMAC BUS Remote I/O refresh, but the CPU Unit will continue running.

  • Page 201: Programming Device Operations For Tasks

    Programming Device Operations for Tasks Section 4-4 will not be interrupted for execution of interrupt task, i.e., execution of the instruction will be completed before the interrupt task is executed, delaying the response of the interrupt. To prevent this, separate data processing for these instructions into more than one instructions, as shown below for XFER.
  • Page 202 Programming Device Operations for Tasks Section 4-4 Programming Console A task is handled as the entire program on the Programming Console. Access and edit a program with a Programming Console by specifying CT00 to CT31 for a cyclic task or IT001 to IT255 for an interrupt task. 0: Cyclic task, 1: Interrupt task Cyclic task No.? Interrupt task No.?
  • Page 203 Programming Device Operations for Tasks Section 4-4...

  • Page 204: File Memory Functions

    SECTION 5 File Memory Functions This section describes the functions used to manipulate file memory. File Memory ..........5-1-1 Types of File Memory .

  • Page 205: File Memory

    File Memory Section 5-1 File Memory The CS/CJ Series support file memory. The following media can be used as memory for storing files. 1,2,3... 1. Memory Cards 2. A specified range in the EM Area called EM file memory Note CJ1M CPU Units do not have an EM Area, so EM file memory can- not be used.
  • Page 206 File Memory Section 5-1 4. When the CX-Programmer is being used, the CPU Unit can recognize symbol tables (including I/O comments) and comments. The transfer des- tination is the Memory Card when a Memory Card is installed or EM File Memory if a Memory Card is not installed.

  • Page 207: File Data

    File Memory Section 5-1 2. Never remove the Memory Card from the CPU Unit when the BUSY indi- cator is lit. Press the Memory Card power OFF button and wait for the BUSY indicator to go out before removing the Memory Card. The Memory Card may become unusable if this is not done.
  • Page 208 File Memory Section 5-1 Comment Files Symbol Table Files Program Index File Comments used by the Tables of variables used Section information (used by CX-Programmer by the CX-Programmer CX-Programmer) Symbols, addresses, data Rung comments Section names, section types, I/O comments comments Comments Files That Can Be Written...

  • Page 209: Files

    File Memory Section 5-1 5-1-3 Files Files are formatted in DOS, and therefore can be used as regular files on a Windows computer. Files are identified by file names and extensions, as shown in the following table. A file name is written using the following characters: Letters A to Z, numbers 0 to 9, !, &, $, #, `, {, }, –, ^, (, ), and _ The following characters cannot be used in file names: ,, ., /, ¥, ?, *, “, :, :, <, >, =, +, space...
  • Page 210 File Memory Section 5-1 Files Automatically Transferred at Startup The File column indicates the files that must be present in the Memory Card to enable automatic transfer at startup. Type Extension Description Explanation File Name Data File AUTOEXEC .IOM I/O memory data •...
  • Page 211 File Memory Section 5-1 3. One example of the CPU Bus Unit settings would be the Data Link Tables. Refer to the operation manuals for specific Units for other setup data. Backup Files (Not The files in the following table are created automatically when data is trans- Supported by CS-series ferred to and from the Memory Card during backup operation.
  • Page 212 File Memory Section 5-1 3. One example of the CPU Bus Unit settings would be the Data Link Tables. Refer to the operation manuals for specific Units for other setup data. Directories It is possible to access files in subdirectories with CS/CJ-series PLCs, but Programming Consoles can access files only when they are in the root direc- tory.
  • Page 213 File Memory Section 5-1 Data Files General-purpose Files 1,2,3... 1. General-purpose data files have filename extensions IOM, TXT, or CSV. (The TXT and CSV files: Not supported by CS-series CS1 CPU Units that are pre-EV1.) Extension Data format Contents Words/field .IOM Binary CS/CJ-series data format...
  • Page 214 File Memory Section 5-1 e) Delimiters: When there are no delimiters, the fields are packed consecutively and then stored. When delimited by commas, commas are insert- ed between fields before they are stored. When delimited by tabs, tab codes are inserted between fields before they are stored. When delimiters (commas or tabs) are specified in FREAD(700), the data is read as delimited data with one-word delimiters (com- mas or tabs).
  • Page 215 File Memory Section 5-1 4 bytes Converted I/O memory to ASCII Delimiter 4 bytes The file displayed as text. Delimiter Contents of ABC.CSV CSV/TXT Data File The following illustration shows the data structure of a CSV data file Structure (Double Word) (ABC.CSV) with double-word fields containing four words from I/O memory: 1234 Hex, 5678 Hex, 9ABC Hex, and DEF0 Hex.
  • Page 216 File Memory Section 5-1 • Example 1: Inputting non-negative decimal values. Item Converting unsigned decimal to 4-digit Converting unsigned decimal to 8-digit hexadecimal hexadecimal Function DEC2HEX(cell_location,4) DEC2HEX(cell_location,8) used Example Input 10 in decimal and convert to 000A in 4-digit Input 10 in decimal and convert to 0000000A in hexadecimal.

  • Page 217: Description Of File Operating Procedures

    File Memory Section 5-1 2. When using the CX-Programmer, you can specify a data file that will ex- ceed the maximum DM Area address D32767 or maximum EM Area ad- dress of E@_32767. If the AUTOEXEC.IOM file exceeds the boundary of the DM area, all remaining data will be written to the EM Area starting at E0_00000 and continuing in order of memory address and banks through the final bank.

  • Page 218: Applications

    File Memory Section 5-1 Operating Medium File name Description Entire Data Area Parameter procedure program data (See Area data note 3.) Auxiliary Area control Memory Card Any valid file Read Not possible Not possible bit operation replaces name the entire program during operation.
  • Page 219 File Memory Section 5-1 Trends, etc. EM file memory Note Data that is often accessed, such as trend data, is better stored in EM file memory rather than on a Memory Card. ASCII Data Files Production data that has been saved on the Memory Card in the TXT or CSV format can be transferred to a personal computer via a Memory Card Adapter (.TXT and .CSV) and edited with a spreadsheet program (Not supported by CS-series CS1...

  • Page 220: Manipulating Files

    Manipulating Files Section 5-2 Use A.STD. Backup Files The backup function can be used to store all of the CPU Unit’s data (the entire I/O memory, program, and parameter area) on the Memory Card without a Programming Device. If a problem develops with the CPU Unit’s data, the backed-up data can be restored immediately.
  • Page 221 Manipulating Files Section 5-2 Operation CX-Programmer Programming Console Formatting file Memory Cards memory EM files Changing file names Not possible Reading file memory data Not possible Deleting files Coping files Not possible Deleting/Creating subdirectories Not possible Programming Create user program file. Create I/O memory file Programming Programming...
  • Page 222 Manipulating Files Section 5-2 HMC-AP001 Memory Card Adapter Memory Card Computer's PC Card slot CX-Programmer Use the following procedure for file memory operations. 1,2,3... 1. Double-click the Memory Card icon in the Project Window with the CPU Unit online. The Memory Card Window will be displayed. 2.

  • Page 223: Fins Commands

    Manipulating Files Section 5-2 Item 1 Item 2 Item 3 Item 4 Item 5 2: Initialize Enter 9713 (Memory Card) or 8426 (EM file memory). 3: Delete Select OBJ, CIO, HR, WR, Media type, file name AR, DM, EM, or STD. Note The file types are shown in the following table.

  • Page 224: Fread(700), Fwrit(701), And Cmnd(490

    Manipulating Files Section 5-2 Note A computer on an Ethernet Network can read and write file memory (Memory Cards or EM file memory) on a CPU Unit through an Ethernet Unit. Data in files can be exchanged if the host computer functions as an FTP client and the CS/CJ-series PLC functions as an FTP server.
  • Page 225 Manipulating Files Section 5-2 The CMND(490) (DELIVER COMMAND) instruction can be executed to issue a FINS command to the CPU Unit itself to perform file operations. File opera- tions such as file formatting, deletion, copying, and renaming can be per- formed on files in the Memory Card or EM file memory (Not supported by CS- series CS1 CPU Units that are pre-EV1).
  • Page 226 Manipulating Files Section 5-2 Transferring ASCII Files ASCII files can be transferred as well as binary files, so the third and fourth digits of the instruction’s control word operand (C) indicate the type of data file (Not supported by CS- series CS1 CPU Units that being transferred and the number of fields between carriage returns.
  • Page 227 Manipulating Files Section 5-2 2. Execution of CMND(490) to send a FINS command to the CPU Unit itself 3. Replacement of the entire program by Auxiliary Area control bit operations 4. Execution of a simple backup operation Use the File Memory Operation Flag (A34313) for exclusive control of file memory instructions to prevent them from being executed while another file memory operation is in progress.
  • Page 228 Manipulating Files Section 5-2 CMND(490): DELIVER COMMAND CMND(490) can be used to issue a FINS command to the local CPU Unit itself to perform file memory operations such as formatting or deleting files. Make the following settings in CMND(490)’s control words when issuing a file- memory FINS command to the local PLC: 1,2,3...

  • Page 229: Replacement Of The Entire Program During Operation

    D00100 and D00101. (for port 7) In this case, the FINS command creates a subdi- rectory named "CS1" within the OMRON" directory in the CPU Unit's Memory Card. The response is composed of the 2-byte command code (2215) and the 2-byte response code.
  • Page 230 Manipulating Files Section 5-2 recorded in advance and the specified program file must exist on the Memory Card in order to replace the program during operation. CPU Unit Replacement User program Memory Card Replacement Start Bit (A65015) turned from OFF to ON. Specifies program Replacement Program...
  • Page 231 Manipulating Files Section 5-2 Note 1. Turn ON the IOM Hold Bit (A50012) if you want to maintain the status of I/O memory data through the program replacement. Turn ON the Forced Status Hold Bit (A50013) if you want to maintain the status of force-set and force-reset bits through the program replacement.
  • Page 232 Section 5-2 Manipulating Files If data tracing is being performed, it will be stopped. Instruction conditions (interlocks, breaks, and block program execution) will be initialized. Differentiation Flags will be initialized whether the IOM Hold Bit is ON or OFF. Operations after The status of the cyclic tasks depends upon their operation-start properties.
  • Page 233 Section 5-2 Manipulating Files Name Address Operation Replacement Start Bit A65015 If this bit has been enabled by the setting the Program Password (A651) (Not supported by CS-series to A5A5 Hex, program replacement will start when this bit is turned from pre-EV1 CS1 CPU Units) OFF to ON.
  • Page 234 Manipulating Files Section 5-2 Start and execute another task to perform any processing required before pro- gram replacement or IOM Hold Bit processing. Main Task (Cyclic task number 0) ← Program version First Cycle Flag ← Version storage area Execution condition Replacement Start Bit...

  • Page 235: Automatic Transfer At Startup

    Section 5-2 Manipulating Files Task protecting data during program replacement (Cyclic task number 31, standby status at startup) Processing to pro- tect data before pro- gram replacement Always ON Flag begins IOM Hold Bit Outputs to required loads during pro- gram replacement.
  • Page 236 Manipulating Files Section 5-2 File File name At startup Required for automatic transfer Program File AUTOEXEC.OBJ The contents of this file are automatically transferred and Required on Memory overwrite the entire user program including CPU Unit task Card. attributes. Data File AUTOEXEC.IOM DM words allocated to Special I/O Units, CPU Bus Units, Not required on...
  • Page 237 Manipulating Files Section 5-2 CPU Unit Front panel DIP switch pin 2 ON User program Memory Card I/O memory • User program file (AUTOEXEC.OBJ) - Re- quired • Parameter area file (AUTOEXEC.STD) - Required • I/O memory file (AUTOEXEC.IOM, ATEX Parameter ECDM.IOM, ATEXECE@.IOM) - Not re- Write at startup...

  • Page 238: Simple Backup Function

    Section 5-2 Manipulating Files Related Auxiliary Bits/Words Name Address Setting Memory Error Flag A40115 ON when an error occurred in memory or there was an error in automatic (Fatal error) transfer from the Memory Card when the power was turned on (automatic transfer at start-up).
  • Page 239 Manipulating Files Section 5-2 status of I/O memory data will be maintained when data is read from the Memory Card. If the Forced Status Hold Bit (A50013) is ON and the PLC Setup is set to maintain the Forced Status Hold Bit Status at Startup when the backup files are written, the status of force-set and force-reset bits will be main- tained when data is read from the Memory Card.
  • Page 240 Manipulating Files Section 5-2 Backup Files Data Files File name and Data area and range of Backup from Restore from Comparing Files required extension addresses stored I/O memory to Memory Card Memory Card when Memory Card to I/O memory to I/O memory restoring data (creating files) CPU Unit...
  • Page 241 Manipulating Files Section 5-2 If the IOM Hold Bit (A50012) is ON and the PLC Setup is set to maintain the IOM Hold Bit Status at Startup when the backup files are written, the status of I/O memory data will be maintained when data is read from the Memory Card.
  • Page 242 Section 5-2 Manipulating Files Verifying Backup Operations with Indicators The status of the Memory Card Power (MCPWR) indicator shows whether a simple backup operation has been completed normally or not. MCPWR Indicator (This example shows a CS-series CPU Unit.) Backup operation Normal completion Error occurred (See note 1.)
  • Page 243 Section 5-2 Manipulating Files Backup operation Normal completion Error occurred (See note 1.) MCPWR status MCPWR status Error Lit → Remains lit while the Lit → Remains lit while the Comparing data between the The following comparison CPU Unit and the Memory Memory Card Power Switch Memory Card Power Switch errors can occur (See note...
  • Page 244 Manipulating Files Section 5-2 Related Auxiliary Bits/Words Name Address Description File Memory Operation Flag A34313 ON when any of the following are being performed. OFF when execution has been completed. • Memory Card detection • CMND instruction executed for local CPU Unit •...
  • Page 245 Section 5-2 Manipulating Files is written to the Memory Card. The data is backed up separately for each Unit and Board. Memory Card power supply switch DeviceNet Unit or other CS1-H or CJ1-H CPU Unit specific Unit/Board All data Simple backup Write Memory Card...
  • Page 246 Manipulating Files Section 5-2 Backing Up Data 1,2,3... 1. Turn ON pin 7 on the CPU Unit’s DIP switch. 2. Press and hold the Memory Card Power Supply Switch for three seconds. The backup data for the Units and Boards will be created in a file and stored in the Memory Card with the other backup data.

  • Page 247: Using File Memory

    Using File Memory Section 5-3 When the Power Supply Switch is pressed, the MCPWR Indicator will flash once, light during the compare operation, and then go OFF if the compare is completed normally and the data is the same. Note Confirm that the Units and Boards are running properly before attempting the above operations.
  • Page 248 Section 5-3 Using File Memory Bank 0 Bank 0 1. Set n in PLC Setup. Bank n Bank n 2. Use a Programming Device or FINS command to format starting at n. Converted to file memory 3. "n" is stored in A344. Bank C Bank C EM used for file memory can be restored to ordinary EM status.

  • Page 249: Operating Procedures For Memory Cards

    Using File Memory Section 5-3 4. Select either Symbols or Comments as the data to transfer. 5-3-2 Operating Procedures for Memory Cards Using a Programming Device 1,2,3... 1. Insert a Memory Card into the CPU Unit. Memory Card 2. Initialize the Memory Card with a Programming Device. Initialize CX-Programmer Programming...
  • Page 250 Using File Memory Section 5-3 DIP switch pin 2 ON Note If pin 7 is ON and pin 8 is OFF, the backup function will be enabled and will override the automatic transfer at startup function. (Turn OFF pins 7 and 8 for automatic transfer at startup.) 5.

  • Page 251: Operating Procedures For Em File Memory

    Using File Memory Section 5-3 2. Turn ON pin 7 and turn OFF pin 8 on the CPU Unit’s DIP switch. 3. The backup files will be restored when the PLC is turned ON. 4. Verify that the MCPWR Indicator flashes once and then goes OFF. (Other changes indicate that an error occurred while restoring the data.) Comparing Data in the Memory Card and CPU Unit 1,2,3...
  • Page 252 Using File Memory Section 5-3 4. Use a Programming Device to read the file in EM file memory to the CPU Unit. Using FREAD(700)/FWRIT(701)/CMND(490) 1,2,3... 1. Use PLC Setup to specify the starting EM bank to convert to file memory. 2.
  • Page 253 Using File Memory Section 5-3...

  • Page 254: Advanced Functions

    SECTION 6 Advanced Functions This section provides details on the following advanced functions: cycle time/high-speed processing functions, index register functions, serial communications functions, startup and maintenance functions, diagnostic and debugging functions, Programming Device functions, and the Basic I/O Unit input response time settings. Cycle Time/High-speed Processing .
  • Page 255 6-6-5 Disabling Power OFF Interrupts ......6-6-6 Clock Functions......... 6-6-7 Program Protection .

  • Page 256: Cycle Time/High-Speed Processing

    Cycle Time/High-speed Processing Section 6-1 Cycle Time/High-speed Processing The following functions are described in this section • Minimum cycle time function • Maximum cycle time function (watch cycle time) • Cycle time monitoring • Quick-response inputs • Interrupt functions • I/O refreshing methods •...

  • Page 257: Maximum Cycle Time (Watch Cycle Time)

    Cycle Time/High-speed Processing Section 6-1 6-1-2 Maximum Cycle Time (Watch Cycle Time) If the cycle time (see note) exceeds the maximum cycle time setting, the Cycle Time Too Long Flag (A40108) will be turned ON and PLC operation will be stopped. Note Here, the cycle time would be the program execution time when us- ing a Parallel Processing Mode for CS1-H, CJ1-H, or CJ1M CPU Units.

  • Page 258: High-Speed Inputs

    Cycle Time/High-speed Processing Section 6-1 Reducing the Cycle Time The following methods are effective ways to reduce the cycle time in CS/CJ- series PLCs: 1,2,3... 1. Put tasks that aren’t being executed in standby. 2. Jump program sections that aren’t being executed with JMP(004) and JME(005).

  • Page 259: I/O Refreshing Methods

    Cycle Time/High-speed Processing Section 6-1 6-1-6 I/O Refreshing Methods There are three ways that the CS/CJ-series CPU Units can refresh data with Basic I/O Units and Special I/O Units: Cyclic refreshing, immediate refreshing, and execution of IORF(097). 1. Cyclic Refreshing I/O refreshing is performed after all of the instructions in executable tasks have been executed.

  • Page 260: Disabling Special I/O Unit Cyclic Refreshing

    Cycle Time/High-speed Processing Section 6-1 3. Execution of IORF(097) and DLNK(226) IORF(097): I/O REFRESH IORF(097) can be used to refresh a range of I/O words upon execution of the instruction. IORF(097) can refresh data allocated to Basic I/O Units and Spe- cial I/O Units.

  • Page 261: Improving Refresh Response For Cpu Bus Unit Data

    Cycle Time/High-speed Processing Section 6-1 refreshing, but this cyclic refreshing can be disabled for individual Units in the PLC Setup. There are basically three reasons to disable cyclic refreshing: 1,2,3... 1. Cyclic refreshing for Special I/O Units can be disabled when the cycle time is too long because so many Special I/O Units are installed.
  • Page 262 Section 6-1 Cycle Time/High-speed Processing Note 1. Longer cycle times (e.g., 100 ms) will increase the interval between when data links are refreshed. DLNK(226) can be used in this case, as shown in the following example. Cyclic task n Data links (Controller Link or DLNK SYSMAC Link) are refreshed here for the CPU Bus Unit with unit number N.

  • Page 263: Maximum Data Link I/O Response Time

    Section 6-1 Cycle Time/High-speed Processing 6-1-9 Maximum Data Link I/O Response Time Normal Processing The following diagram illustrates the data flow that will produce the maximum data link I/O response time when DLNK(226) is not used. Input Input Unit Basic I/O Units refreshed.
  • Page 264 Cycle Time/High-speed Processing Section 6-1 Output ON delay 15 ms Total (data link I/O response time) 126.5 ms Using DLNK(226) The following diagram illustrates the data flow that will produce the maximum data link I/O response time when DLNK(226) is used. Input DLNK(226) execution Input Unit...

  • Page 265: Background Execution

    Section 6-1 Cycle Time/High-speed Processing The equation for maximum data link I/O response time is as follows: Input ON delay 1.5 ms Cycle time of PLC at CPU Unit #1 × 1.5 25 ms × 1.5 Faster by 12.5 ms (25 ms x 0.5) Communications cycle time ×...
  • Page 266 Cycle Time/High-speed Processing Section 6-1 ground execution so that no more than one instruction is executed at the same time. 3. If an instruction for which background execution has been specified is ex- ecuted, execution will only be started in the cycle in which the execution condition was met and execution will not be completed in the same cycle.
  • Page 267 Cycle Time/High-speed Processing Section 6-1 instruction (e.g., MOVL(498)) to copy the address in A595 and A596 to an index register. Conditions Flags Conditions Flags will not be updated following execution of instructions pro- cessed in the background. To access the Conditions Flag status, execute an instruction that affects the Conditions Flags in the same way, as shown in the following example, and then access the Conditions Flags.
  • Page 268 Section 6-1 Cycle Time/High-speed Processing Outputting to Data Registers (DR) for MAX(182) or MIN(183) If MAX(182) or MIN(183) is executed with a data register specified as the out- put word for the minimum or maximum value, an instruction execution error will occur and the ER Flag will turn ON.
  • Page 269 Cycle Time/High-speed Processing Section 6-1 Name Address Description Background A39510 Turns ON when an instruction execution error or illegal Execution ER/ access error occurs in an instruction being executed in AER Flag the background. Turns OFF when power is turned ON or operation is started.
  • Page 270 Cycle Time/High-speed Processing Section 6-1 Programming Example 1 Traditional Programming without Background Execution As shown below, processing is completed when the instruction is executed. Execution condition MAX(182) is executed completely as soon as the execution condition “a” turns ON. D00000 D00100 D00200 SUM(184) can be executed immediately...

  • Page 271: Sharing Index And Data Registers Between Tasks

    Cycle Time/High-speed Processing Section 6-1 Programming Example 2 This examples show background execution when index register output is specified, as is possible for MAX(182), MIN(183), and SRCH(181). Traditional Programming without Background Execution As shown below, the actual memory map address of the word containing the maximum value is output to an index register.
  • Page 272 Cycle Time/High-speed Processing Section 6-1 CS Series Operation Manual (W339) or the CJ Series Operation Manual (W393) for information on storing and loading index register contents. 2. The switching time between tasks will be somewhat faster when index and data registers are shared. It is recommended to set shared registers if the registers are not being used or if there is no particular need for separate registers in each task.

  • Page 273: Index Registers

    Index Registers Section 6-2 Index Registers 6-2-1 What Are Index Registers? Index Registers function as pointers to specify PLC memory addresses, which are absolute memory addresses in I/O memory. After storing a PLC memory address in an Index Register with MOVR(560) or MOVRW(561), input the Index Register as an operand in other instructions to indirectly address the stored PLC memory address.
  • Page 274 Index Registers Section 6-2 Variation Syntax Indirect addressing with DR offset DR@,IR@ Indirect addressing with auto-increment Increment by 1: ,IR@+ Increment by 2: ,IR@++ Indirect addressing with auto-decrement Decrement by 1: ,–IR@ Decrement by 2: ,– –IR@ Instructions That Directly Address Index Registers Index registers can be directly addressed by the following instructions.
  • Page 275 Index Registers Section 6-2 The 11-instruction subroutine on the left is equivalent to the 200-instruction subroutine on the right. W000 Puts the PLC memory MOVRW 0000 address of T0000's T0000 D00100 PV in IR0. T0000 W000 Puts the PLC memory address of T0000's T0000 Completion Flag in IR1.

  • Page 276: Processing Related To Index Registers

    Index Registers Section 6-2 Direct Addressing of Index Registers Index Registers can be directly addressed only in the instructions shown in the following table. Instruction group Instruction name Mnemonic Primary function Data Movement Instruc- MOVE TO REGISTER MOVR(560) Stores the PLC memory address tions of a bit or word in an Index Regis- MOVE TIMER/COUNTER PV TO REG-...
  • Page 277 Index Registers Section 6-2 Processing Purpose Instructions Table Tables with one- Basic pro- Find values such as the checksum, a FCS(180), SRCH(181), MAX(182), process- word records cessing particular value, the maximum value, MIN(183), and SUM(184) or minimum value in the range. (Range instruc- tions) Special...
  • Page 278 Index Registers Section 6-2 LIFO (Last-in First-out) Processing The following diagram shows the operation of a last-in first-out (LIFO) stack. Pointer address Reads most recent word of data stored in the stack. Each time that a word is read, the pointer is decremented by one to indicate the ne xt address for storage.
  • Page 279 Index Registers Section 6-2 Table Processing (Range Instructions) The range instructions act on a range of words, which can be considered a table of one-word records. These instructions perform basic operations such as finding the maximum value or minimum value in the range, search for a particular value in the range, or calculating the sum or FCS.
  • Page 280 Index Registers Section 6-2 record data, comparing record data, and performing calculations with record data. A typical application of record tables is storing manufacturing data for different models of a product (such as temperature and pressure settings) in record form and switching from model to model just by changing the record number. Model A ↓...
  • Page 281 Index Registers Section 6-2 0000 Defines record table 1 with 1,000 records of 5 words each. &5 &1000 E0_00000 SETR Stores the PLC memory address of table number 1's first record (record 0) in IR0. &0 Jumps past the FOR-NEXT loop if the pro- cessing conditions haven't been set.

  • Page 282: Serial Communications

    Description Ports Peripheral RS-232C Host link 1) Various control commands such Host computer OMRON PT (Programmable as reading and writing I/O mem- Terminal) ory, changing the operating mode, and force-setting/reset- ting bits can be executed by issuing host link commands or FINS commands from the host computer to the CPU Unit.
  • Page 283 Serial Communications Section 6-3 Protocol Connections Description Ports Peripheral RS-232C Peripheral Provides high-speed communica- Programming Devices tions with Programming Devices (Not Programming Consoles) other than Programming Con- soles. (Remote programming through modems is not supported.) Serial PLC Up to ten words per Unit can be Not allowed OK CJ1M CPU Unit Polling Unit...

  • Page 284: Host Link Communications

    Serial Communications Section 6-3 6-3-1 Host Link Communications The following table shows the host link communication functions available in CS/CJ PLCs. Select the method that best suits your application. Command flow Command type Communications method Configuration Create frame in the host com- Host computer Directly connect the host computer in a 1:1 Host link command...
  • Page 285 Serial Communications Section 6-3 2. The FINS command is transmitted from the PLC with a host link header and terminator attached. A program must be prepared in the host comput- er to analyze the FINS commands and return the proper responses. Procedure Programming Console Set the PLC Setup from a Pro-...
  • Page 286 Serial Communications Section 6-3 Header Name Function code EM AREA READ Reads the contents of the specified number of EM Area words, starting from the specified word. CIO AREA WRITE Writes the specified data (word units only) to the CIO Area, starting from the specified word.
  • Page 287 Serial Communications Section 6-3 Header Name Function code INITIALIZE (command only) Initializes the transmission control procedure of all PLCs connected to the host computer. Undefined command This response is returned if the header code of a command was not (response only) recognized.
  • Page 288 Serial Communications Section 6-3 Type Command Name Function code File Memory FILE NAME READ Reads the file memory’s file information. SINGLE FILE READ Reads the specified amount of data from the specified point in a file. SINGLE FILE WRITE Writes the specified amount of data from the specified point in a file.

  • Page 289: Protocol Communications

    Serial Communications Section 6-3 6-3-2 No-protocol Communications The following table lists the no-protocol communication functions available in CS/CJ PLCs. Transfer direction Method Max. amount Frame format Other of data functions Start code End code Data transmission Execution of TXD(236) 256 bytes Yes: 00 to FF Yes: Send delay...

  • Page 290: Nt Link (1:N Mode)

    Serial Communications Section 6-3 memory. Up to 256 bytes (including the start and end codes) can be trans- ferred in no-protocol mode. The following table shows the message formats that can be set for transmis- sions and receptions in no-protocol mode. The format is determined by the start code (ST) and end code (ED) settings in the PLC Setup.

  • Page 291: Serial Plc Links (Cj1M Cpu Units Only)

    Serial Communications Section 6-3 PLC Setup Communications Programming Name Settings Default values Other conditions port Console setting contents address Peripheral port Serial communica- 02 Hex: NT Link 00 Hex: Host Link Turn ON pin 4 on tions mode (1:N mode) the CPU Unit DIP Bits: 8 to 11...
  • Page 292 Section 6-3 Serial Communications Specifications Item Specifications Connection method RS-232C or RS-422A/485 connection via the CPU Unit’s RS- 232C port. Allocated data area Serial PLC Link Words: CIO 3100 to CIO 3199 (Up to 10 words can be allocated for each CPU Unit.) Number of Units 9 Units max., comprising 1 Polling Unit and 8 Polled Units (A...
  • Page 293 Section 6-3 Serial Communications Example: Complete link method, highest unit number: 3. In the following diagram, Polled Unit No. 2 is either a PT or is a Unit not present in the network, so the area allocated for Polled Unit No. 2 is undefined in all nodes.
  • Page 294 Serial Communications Section 6-3 Allocated Words Complete Link Method Address Link words 1 word 2 words 3 words 10 words CIO 3100 Polling Unit CIO 3100 CIO 3100 to CIO 3100 to CIO 3100 to CIO 3101 CIO 3102 CIO 3109 Polled Unit No.
  • Page 295 Section 6-3 Serial Communications Procedure The Serial PLC Links operate according to the following settings in the PLC Setup. Settings at the Polling Unit 1,2,3... 1. Set the serial communications mode of the RS-232C communications port to Serial PLC Links (Polling Unit). 2.
  • Page 296 Serial Communications Section 6-3 Related Auxiliary Area Flags Name Address Details Read/write Refresh timing RS-232C Port A39204 Turns ON when a com- Read • Cleared when power is turned ON. Communica- munications error occurs • Turns ON when a communications error tions Error Flag at the RS-232C port.

  • Page 297: Changing The Timer/Counter Pv Refresh Mode

    Changing the Timer/Counter PV Refresh Mode Section 6-4 Changing the Timer/Counter PV Refresh Mode 6-4-1 Overview Previously, CS1 CPU Units used only BCD for the timer/counter PV refresh mode. Therefore, all timer/counter settings were input as BCD values. Other CPU Units (see notes 1 and 2) can use either BCD mode or binary mode to refresh the present values of timer and counter instructions (see note 3).

  • Page 298: Functional Specifications

    Section 6-4 Changing the Timer/Counter PV Refresh Mode 6-4-2 Functional Specifications Item Details Timer/counter PV refresh Must be set using CX-Programmer Ver.3.0 (not sup- mode setting method ported by CX-Programmer Ver 2.1 or earlier). Set in the PLC properties of CX-Programmer Ver.3.0. Supported CPU Units CS1-H/CJ1-H CPU Units from Lot No.

  • Page 299: Bcd Mode/Binary Mode Selection And Confirmation

    Changing the Timer/Counter PV Refresh Mode Section 6-4 6-4-3 BCD Mode/Binary Mode Selection and Confirmation When writing a new program, the BCD mode/binary mode is selected in the PLC property settings in CX-Programmer Ver 3.0. Note The BCD mode/binary mode selection is supported by CX-Programmer Ver 3.0 or later only.

  • Page 300: Bcd Mode/Binary Mode Mnemonics And Data

    Changing the Timer/Counter PV Refresh Mode Section 6-4 When the setting is changed, the following dialog box will be displayed au- tomatically. Cancel Click the OK Button to execute the program check. The program check results will be displayed in the output window. Example: The TIM instruction has been used even though the mode has been changed to binary mode.

  • Page 301: Restrictions

    Changing the Timer/Counter PV Refresh Mode Section 6-4 BCD Mode/Binary Mode Data Display PLC propertY Meaning of input Setting range Example: Timer and display number: 0000, symbols Set value: 10 s BCD mode The # symbol indi- #0000 to #9999 cates the instruction value (a BCD value 0000...

  • Page 302: Instructions And Operands

    Changing the Timer/Counter PV Refresh Mode Section 6-4 • The differences between the CX-Programmer and Programming Console operations when an incorrect timer/counter PV refresh mode instruction is input are as follows: • CX-Programmer: An error will occur if an instruction is input for a different mode than that set as the timer/counter PV refresh mode under PLC properties.
  • Page 303 Changing the Timer/Counter PV Refresh Mode Section 6-4 Instructions and Operands Timer and Counter Instructions TIMER (100 ms) Instruction name BCD mode Binary mode Mnemonic TIMX(550) S (timer set value) #0000 to #9999 (BCD) &0 to &65535 (decimal) or #0000 to #FFFF (hexa- decimal) Setting time (unit: 0.1 s) 0 to 999.9 s...
  • Page 304 Changing the Timer/Counter PV Refresh Mode Section 6-4 COUNTER Instruction name BCD mode Binary mode Mnemonic CNTX(546) S (counter set value) #0000 to #9999 (BCDÅj &0 to& 65535 (decimal) or #0000 to #FFFF (hexa- decimal) Setting 0 to 9,999 times 0 to 65,535 times REVERSIBLE COUNTER Instruction name...

  • Page 305: Using A Scheduled Interrupt As A High-Precision Timer (Cj1M Only)

    Using a Scheduled Interrupt as a High-precision Timer (CJ1M Only) Section 6-5 Using a Scheduled Interrupt as a High-precision Timer (CJ1M Only) When using a CJ1M CPU Unit, the following functions allow a scheduled interrupt to be used as a high-precision timer. •...

  • Page 306: Specifying A Reset Start With Msks(690)

    Using a Scheduled Interrupt as a High-precision Timer (CJ1M Only) Section 6-5 6-5-2 Specifying a Reset Start with MSKS(690) When CJ1M CPU Units are used and the MSKS(690) instruction is used to start the scheduled interrupt, the internal timer can be reset before starting the interrupt (this is called a reset start).

  • Page 307: Startup Settings And Maintenance

    Startup Settings and Maintenance Section 6-6 Startup Settings and Maintenance This section describes the following functions related to startup and mainte- nance. • Hot Start/Hot Stop Functions • Startup Mode Setting • Power OFF Detection Delay Setting • Disabling Power OFF Interrupts •...

  • Page 308: Startup Mode Setting

    Startup Settings and Maintenance Section 6-6 have the same status that they had before the program was stopped. (When the IOM Hold Bit is OFF, instructions will be executed after the outputs have been cleared.) PLC Power ON In order for all data* in I/O memory to be retained when the PLC is turned on (OFF →...

  • Page 309: Run Output

    Startup Settings and Maintenance Section 6-6 6-6-3 RUN Output Some of the Power Supply Units (the C200HW-PA204R, C200HW-PA209R, and CJ1W-PA205R) are equipped with a RUN output. This output point is ON (closed) when the CPU Unit is operating in RUN or MONITOR mode and OFF (open) when the CPU Unit is in PROGRAM mode.

  • Page 310: Clock Functions

    Startup Settings and Maintenance Section 6-6 This function can be used with sets of instructions that must be executed as a group, e.g., so that execution does not start with intermediate stored data the next time power is turned ON. Procedure 1,2,3...

  • Page 311: Program Protection

    Startup Settings and Maintenance Section 6-6 Note The CS-series CS1 CPU Units are shipped without the backup battery installed, and the CPU Unit’s internal clock will be read 00/01/01 00:00:00 or possibly another value when the battery is connected. To use the clock func- tions, connect the battery, turn the power ON, and set the time and date with a Programming Device (Programming Console or CX-Programmer) or the FINS command (07 02, CLOCK WRITE).
  • Page 312 Startup Settings and Maintenance Section 6-6 Read/write-protection Using Passwords Both read and write access to the user program area can be blocked from the CX-Programmer. Protecting the program will prevent unauthorized copying of the program and loss of intellectual property. A password is set for program protection from a Programming Device and access is prevented to the whole program.

  • Page 313: Remote Programming And Monitoring

    The following information can be read for CS/CJ-series Units from the CX- Programer. • Manufacturing information (lot number, serial number, etc.): Facilitates providing information to OMRON when problems occur with Units. • Unit information (type, model number, correct rack/slot position): Provides an easy way to obtain mounting information.

  • Page 314: Flash Memory

    Startup Settings and Maintenance Section 6-6 6-6-10 Flash Memory This function is supported only by the CS1-H, CJ1-H, or CJ1M CPU Units. With CS1-H, CJ1-H, or CJ1M CPU Units, the user program and parameters are automatically backed up in flash memory whenever they are written to or altered in the CPU Unit.

  • Page 315: Startup Condition Settings

    Startup Settings and Maintenance Section 6-6 The amount of time required to back up data (the time the BKUP indicator will be lit) will depend on the size of the user program, as shown in the following table. User Backup processing time program size MONITOR mode PROGRAM...
  • Page 316 Startup Settings and Maintenance Section 6-6 This function is controller by setting the Startup Condition and Inner Board Setting described in the following table. Startup conditions PLC Setup Startup Condition Inner Board Setting (Programming Console (Programming Console address 83, bit 15) address 84, bit 15) To start without wait- 1: Enable operation without...

  • Page 317: Diagnostic Functions

    Diagnostic Functions Section 6-7 Diagnostic Functions This section provides a brief overview of the following diagnostic and debug- ging functions. • Error Log • Output OFF Function • Failure Alarm Functions (FAL(006) and FALS(007)) • Failure Point Detection (FPD(269)) Function 6-7-1 Error Log Each time that an error occurs in a CS/CJ-series PLC, the CPU Unit stores...

  • Page 318: Output Off Function

    Diagnostic Functions Section 6-7 Order of Error code occurrence Error Log Area Error code Error contents Minute, second Time of Day, hour occurrence Year, month Error code Error contents Minute, second Time of Day, hour occurrence Year, month Error code Error contents Minute, second Day, hour...

  • Page 319: Failure Point Detection

    Diagnostic Functions Section 6-7 1,2,3... 1. The FAL Error Flag (A40215) or FALS Error Flag (A40106) is turned ON. 2. The corresponding error code is written to A400. 3. The error code and time of occurrence are stored in the Error Log. 4.
  • Page 320 Diagnostic Functions Section 6-7 Logic Diagnosis Function FPD(269) determines which input bit is causing the diagnostic output to remain OFF and outputs that bit’s address. The output can be set to bit address output (PLC memory address) or message output (ASCII). •...

  • Page 321: Simulating System Errors

    Diagnostic Functions Section 6-7 6-7-5 Simulating System Errors This function is supported only by the CS1-H, CJ1-H, or CJ1M CPU Units. FAL(006) and FALS(007) can be used to intentionally create fatal and non- fatal system errors. This can be used in system debugging to test display messages on Programmable Terminals (PTs) or other operator interfaces.

  • Page 322: Cpu Processing Modes

    CPU Processing Modes Section 6-8 This function can be used when only system FAL errors need to be stored in the error log, e.g., when there are many user-defined errors generated by the program using FAL(006) and these fill up the error log too quickly. PLC Setup Programming Name...
  • Page 323 CPU Processing Modes Section 6-8 Normal Mode Overseeing processing Program execution Cycle time I/O refreshing Peripheral Servicing Parallel Processing Modes Program Execution Cycle Peripheral Servicing Cycle Overseeing processing Overseeing processing Cycle time for peripheral servicing Peripheral servicing Program execution Cycle time for program execution I/O refreshing Parallel Processing Modes...
  • Page 324 CPU Processing Modes Section 6-8 are for a program consisting of basic instructions with a cycle time of 10 ms and with one Ethernet Unit. These values are provided for reference only and will vary with the system.) Item Normal Mode Parallel Processing with Parallel Processing Asynchronous Memory...
  • Page 325 CPU Processing Modes Section 6-8 PLC Setup The processing mode is specified in the PLC Setup. Programming Name Setting Default CPU Unit Console refresh address timing Word 08 to CPU Pro- 00 Hex: Normal Mode 00 Hex: Start of cessing Normal operation 01 Hex: Parallel Processing...
  • Page 326 CPU Processing Modes Section 6-8 Peripheral Servicing Overseeing Battery check, user program memory check, etc. 0.2 ms Peripheral Event servicing for Special I/O Units Includes event servicing to servicing access I/O memory (See note.) Event servicing for CPU Bus Units Max.

  • Page 327: Parallel Processing Mode And Minimum Cycle Times

    Peripheral Servicing Priority Mode Section 6-9 with common codes beginning with 01 Hex or forced set/reset commands with common codes beginning with 23 Hex) and 2) Servicing any received C-mode commands that access I/O memory (excluding NT Links using the peripheral or RS-232C port).

  • Page 328: Peripheral Servicing Priority Mode

    Peripheral Servicing Priority Mode Section 6-9 6-9-1 Peripheral Servicing Priority Mode If the Peripheral Servicing Priority Mode is set, program execution will be interrupted at the specified time, the specified servicing will be performed, and program execution will be resumed. This will be repeated through program execution.
  • Page 329 Peripheral Servicing Priority Mode Section 6-9 PLC Setup Settings The following settings must be made in the PLC Setup to use the Peripheral Servicing Priority Mode. • Slice Time for Program Execution: 5 to 255 ms in 1-ms increments • Slice Time for Peripheral Servicing: 0.1 to 25.5 ms in 0.1-ms increments •...

  • Page 330: Temporarily Disabling Priority Mode Servicing

    Peripheral Servicing Priority Mode Section 6-9 Auxiliary Area Information If the slice times are set for program execution and peripheral servicing, the total of all the program execution and peripheral servicing slice times will be stored in A266 and A267. This information can be used as a reference in making appropriate adjustments to the slice times.
  • Page 331 Peripheral Servicing Priority Mode Section 6-9 Operation Time slice for Time slice for Time slice for program execution peripheral servicing program execution Peripheral Peripheral Normal peripheral servicing servicing servicing Interrupted Execution Interrupted Execution Execution I/O refresh Program section requiring data concurrence DI(693) executed.
  • Page 332 Peripheral Servicing Priority Mode Section 6-9 Applicable Program Areas Area Applicability Block programming areas Step programming areas Subroutine programs Interrupt tasks Condition Flags Flag Label Operation Error Flag Turns ON if EI(694) is executed in an interrupt task. CS1-H, CJ1-H, and CJ1M CPU Units IOSP(287) When executed, IOSP(287) disables peripheral servicing.

  • Page 333: Battery-Free Operation

    Battery-free Operation Section 6-10 6-10 Battery-free Operation The CS-series and CJ-series PLCs can be operated without a Battery installed (or with an exhausted Battery). The procedure used for battery-free operation depends on the following items. • CPU Unit • Whether or not I/O memory (e.g., CIO Area) is maintained or not •...
  • Page 334 Battery-free Operation Section 6-10 as it is for the CS1 CPU Units. (With a Memory Card, the DM and EM Area data can be included.) CJ1 and CJ1 CPU Units Battery-free operation is possible for the CS1 and CJ1 CPU Units by automat- ically transferring data from a Memory Card at startup.

  • Page 335: Other Functions

    Other Functions Section 6-11 CS1 and CJ1 CPU Units Power ON Operation with a Battery Use normal operation. No Memory Card is required. CIO/WR/TIM Maintain previous PLC Setup: Disable detection a CNT/HR/DM/EM low battery voltage and set I/O I/O data at Required data? Memory Hold Bit status to be startup?

  • Page 336: I/O Area Allocation

    Other Functions Section 6-11 PLC Setup The input response times for the 80 slots in a CS/CJ PLC (Rack 0 Slot 0 through Rack 7 slot 9) can be set in the 80 bytes in addresses 10 through 49. Programming Name Setting (Hex) Default (Hex)
  • Page 337 Other Functions Section 6-11...

  • Page 338: Section 7 Program Transfer, Trial Operation, And Debugging

    SECTION 7 Program Transfer, Trial Operation, and Debugging This section describes the processes used to transfer the program to the CPU Unit and the functions that can be used to test and debug the program. Program Transfer..........Trial Operation and Debugging.

  • Page 339: Program Transfer

    Program Transfer Section 7-1 Program Transfer A Programming Device is used to transfer the programs, PLC Setup, I/O memory data, and I/O comments to the CPU Unit with the CPU Unit in PRO- GRAM mode. Program Transfer Procedure for CX-Programmer 1,2,3...

  • Page 340: Differential Monitoring

    Trial Operation and Debugging Section 7-2 Output Unit CPU Unit Forced Forced ON regardless of programming Forced Input ignored The following areas can be force-set and reset. CIO (I/O bits, data link bits, CPU Bus Unit bits, Special I/O Unit bits, Inner Board bits, SYSMAC BUS bits, Optical I/O Unit bits, work bits), WR Area, Timer Completion Flags, HR Area, Counter Completion Flags.

  • Page 341: Online Editing

    Trial Operation and Debugging Section 7-2 Related Auxiliary Bits/Words Name Address Description Differentiate Monitor A50809 Turns ON when the differential monitoring condition has been met dur- Completed Flag ing differential monitoring. Note: The flag will be cleared when differential monitoring is started. 7-2-3 Online Editing The Online Editing function is used to add to or change part of a program in a...
  • Page 342 Trial Operation and Debugging Section 7-2 A message will be displayed on the CX-Programmer or Programming Console if the limit is exceeded, and further editing will not be possible until the CPU Unit has completed backing up the data. Task Size and Cycle Time The relation to the size of the task being edited to cycle time extension is as Extension follows:...
  • Page 343 Trial Operation and Debugging Section 7-2 has been completed, the Online Editing Processing Flag (A20111) will turn OFF. Online editing can also be temporarily disabled by turning ON the Online Edit- ing Disable Bit (A52709) while online editing is being performed. Here too, the Online Editing Wait Flag (A20110) will turn ON.

  • Page 344: Tracing Data

    Trial Operation and Debugging Section 7-2 Output Unit CPU Unit All OFF Output OFF Bit: ON 7-2-4 Tracing Data The Data Trace function samples specified I/O memory data using any one of the following timing methods, and it stores the sampled data in Trace Memory, where they can be read and checked later from a Programming Device.
  • Page 345 Trial Operation and Debugging Section 7-2 Sampling Start Bit Trace Start Bit Trace Trigger Monitor Flag Trace Busy Flag Trace Completed Flag Sampling The following traces can be executed. Scheduled Data Trace A scheduled data trace will sample data at fixed intervals. Specified sampling times are 10 to 2,550 ms in 10-ms units.
  • Page 346 Trial Operation and Debugging Section 7-2 Name Address Description Trace Trigger Monitor A50811 This flag turns ON when the trace trigger condition has been met after Flag the Trace Start Bit has turned ON. This flag will turn OFF when the sampling is started again by turning ON the Sampling Start Bit.

  • Page 348: Cqm1H, Cvm1, And Cv-Series Plcs

    Appendix A PLC Comparison Charts: CJ-series, CS-series, C200HG/HE/HX, CQM1H, CVM1, and CV-series PLCs Functional Comparison Item CJ Series CS Series C200HX/HG/ CVM1/CV CQM1H Series Basic features No. of I/O 2,560 points 5,120 points 1,184 points 6,144 points 512 points pacity points Program 120 Ksteps...
  • Page 349 PLC Comparison Charts Appendix A Item CJ Series CS Series C200HX/HG/ CVM1/CV CQM1H Series Structure Screw mounting DIN Track mounting Backplanes Size (H x D, mm) 90 x 65 130 x 123 130 x 118 250 x 100 110 x 107 Number of I/O Units 40 Units...
  • Page 350 PLC Comparison Charts Appendix A Item CJ Series CS Series C200HX/HG/ CVM1/CV CQM1H Series External mem- Medium Memory card Memory card Memory cas- Memory card Memory cas- (Flash ROM) (Flash ROM) sette (RAM, sette (ROM, (EEPROM, EEPROM, EEPROM, EPROM) EPROM) EPROM) Capacity 48 Mbytes...
  • Page 351 PLC Comparison Charts Appendix A Item CJ Series CS Series C200HX/HG/ CVM1/CV CQM1H Series Interrupts I/O interrupts Yes (Max 2 Interrupt Yes (Max. 4 or 2 Yes (Max. 2 Yes (Max. 4 Yes (4 built into Input Units: 32 points, Interrupt Input Interrupt Input Interrupt Input...
  • Page 352 PLC Comparison Charts Appendix A Item CJ Series CS Series C200HX/HG/ CVM1/CV CQM1H Series Initial Input response time Set in PLC Setup Set in PLC Setup No Set in PLC set- for Basic I/O Unit Setup tings Rack first addresses Set in I/O table from Set in I/O table Set in PLC...
  • Page 353 PLC Comparison Charts Appendix A Item CJ Series CS Series C200HX/HG/ CVM1/CV CQM1H Series Initial Power Restart Continuation Set in PLC set- supply Bit Hold Setup tings Startup mode Set in PLC Setup Set in PLC Setup Set in PLC Set in PLC Set in PLC (contd.)
  • Page 354 PLC Comparison Charts Appendix A Item CJ Series CS Series C200HX/HG/ CVM1/CV CQM1H Series Initial Pro- Programming Con- Set on DIP switch CS1: Set on DIP Set on DIP Set on DIP set- gram- sole language switch switch switch tings ming CS1-H: Set from (contd.)
  • Page 355 PLC Comparison Charts Appendix A Item CJ Series CS Series C200HX/HG/ CVM1/CV CQM1H Series Auxil- Errors Error log storage iary area/pointer Area, Error codes contd Initial Initializing PLC Setup No set- tings Com- PLC Link Operating Yes (PLC Link Auxil- Yes (PLC Link Yes (AR) muni-...
  • Page 356 PLC Comparison Charts Appendix A Item CJ Series CS Series C200HX/HG/ CVM1/CV CQM1H Series I/O Memory CIO Area WR Area Temporary Relay Area Auxiliary Area SR Area Link Area Yes (Data Link Area) Yes (Data Link Yes (Data Link Area) Area) C200H Special I/O Yes (CIO Area)
  • Page 357 PLC Comparison Charts Appendix A Instruction Comparison Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Sequence LOAD/AND/OR Input AND/ Instructions AND LOAD/OR LOAD LD/OR CONDITION ON Yes (*1) CONDITION OFF DOWN Yes (*1) BIT TEST TST/ Yes (Bit position Yes (Bit position Yes (Bit position Yes (Bit position...
  • Page 358 PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Timer and TIMER Counter (BCD) Instructions TIMX Yes(*4) Yes(*4) (binary) HIGH-SPEED TIMH TIMER (BCD) TIMHX Yes(*4) Yes(*4) (binary) ONE-MS TIMER TMHH (BCD) TMHHX Yes(*4) Yes(*4) (binary) ACCUMULATIVE...
  • Page 359 PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Data Move- MOVE ment DOUBLE MOVE MOVL Instruction MOVE NOT DOUBLE MOVE MVNL DATA EXCHANGE XCHG DOUBLE DATA XCGL EXCHANGE MOVE QUICK MOVQ BLOCK TRANS- XFER Yes (Number Yes (Number...
  • Page 360 PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Data Shift SHIFT REGISTER Instructions REVERSIBLE SFTR SHIFT REGISTER ASYNCHRO- ASFT NOUS SHIFT REGISTER WORD SHIFT WSFT Yes (Same as Yes (Same as CV: 3 operands) CV: 3 operands) ARITHMETIC ASL/...
  • Page 361 PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Conversion BCD-TO-BINARY/ BIN/ Instructions DOUBLE BCD-TO- BINL DOUBLE BINARY BINARY-TO-BCD/ BCD/ DOUBLE BINARY- BCDL TO-DOUBLE BCD 2’S COMPLE- NEG/ Yes (Same as Yes (Same as MENT/ DOUBLE NEGL CV but UP does...
  • Page 362 PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Floating- FLOATING TO 16- FIX/ Yes (*1) point Math BIT/32-BIT BIN, FIXL, Instructions 16-BIT/32-BIT BIN FLT/ TO FLOATING FLTL FLOATING-POINT +F, –F, Yes (*1) ADD/FLOATING- *F, /F POINT SUB-...
  • Page 363 PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Table Data SET STACK SSET Yes (Four words Yes (Four words Yes (Four words Processing of stack control of stack control of stack control Instructions information.
  • Page 364 PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Subrou- SUBROUTINE SBS, Yes (Subroutine Yes (Subroutine Yes (Subroutine Yes (Subroutine Yes (Subroutine tines CALL/SUBROU- SBN, number speci- number speci- number speci- number speci- number speci- Instructions TINE ENTRY/SUB-...
  • Page 365 PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Special I/O SPECIAL I/O UNIT IORD/ IORD/IOWR (Up IORD/IOWR (Up IORD/IOWR READ/WRIT Unit READ and SPE- IOWR to 96 Units. Will to 96 Units. Will Instructions CIAL I/0 UNIT not be used to...
  • Page 366 PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Serial Com- RECEIVE Yes (Number of Yes (Number of Yes (Number of Yes (Number of munica- stored bytes stored bytes stored bytes stored bytes tions specified in specified in...
  • Page 367 PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Display DISPLAY MES- Yes (Messages Yes (Messages Yes (Messages Yes (Messages Yes (Messages Instructions SAGE ended by NUL) ended by NUL) ended by CR) ended by CR) ended by CR) DISPLAY LONG...
  • Page 368 PLC Comparison Charts Appendix A Item Mne- CJ Series CS Series C200HX/HG/HE CVM1/CV CQM1H monic Series Block Programming Instructions BPRG/ Yes (*1) BEND, ELSE/ IEND, WAIT, EXIT, LOOP/ LEND, BPPS/ BPRS, TIMW, CNTW, TMHW Task Con- TASK ON/TASK TKON/ trol Instruc- TKOF tions Note *1: Supported only by CVM1 (V2).
  • Page 370 Appendix B Changes from Previous Host Link Systems There are differences between Host Link Systems created using the CS/CJ-series Serial Communications Boards (CS Series only) and Unit in comparison to Host Link Systems created with Host Link Units and CPU Units in other PLC product series.
  • Page 371 Changes from Previous Host Link Systems Appendix B Previous Model number Changes required for CS/CJ-series product products Wiring Other CVM1 or CV- CVM1/CV-CPU@@-E No changes have been made It may be possible to use the host computer series CPU in wiring. programs without alteration as long as the Units same communications settings (e.g., baud rate)
  • Page 372 Changes from Previous Host Link Systems Appendix B Previous Model number Changes required for CS/CJ-series product products Wiring Other CVM1 or CV- CVM1/CV-CPU@@-E No changes have been made It may be possible to use the host computer series CPU Units in wiring.

  • Page 374: Index

    Index counters refresh mode addressing CPU Unit index registers basic operation – indirect addresses capacities memory addresses internal structure operands operation See also index registers C-series Host Link Units alarms changes in communications specifications user-programmed alarms C-series Units applications changes in communications specifications file memory CVM1 Units precautions...
  • Page 375 Index force-setting bits debugging EC Directives FOR-NEXT loop EM file memory initializing operations Greater Than Flag See also file memory Equals Flag error log errors high-speed inputs access error Host Link commands error log Host Link communications failure point detection Host Link Units fatal changes in communications specifications...
  • Page 376 Index data shift instructions debugging instructions decrement instructions mathematics differentiated instructions floating-point math instructions display instructions special math instructions execution conditions symbol math instructions failure diagnosis instructions maximum cycle time file memory memory file memory instructions block diagram of CPU Unit memory floating-point math instructions clearing high-speed counter and pulse output instructions...
  • Page 377 Index outputs program capacity turning OFF program protection program structure programs and tasks protecting the program Parameter Area remote programming files restrictions Parameter Date See also block programs peripheral servicing step programming priority servicing restrictions Peripheral Servicing Priority Mode tasks and programs transferring the program PLC Setup Programming Consoles...
  • Page 378 Index startup settings setup Units See also installation profiles signed binary data unsigned binary data stack processing up-differentiated instructions standby status – user program description See also programming startup User Program Date automatic file transfer hot starting and stopping V–W startup mode step programming write-protection...

  • Page 380: Revision History

    Revision History A manual revision code appears as a suffix to the catalog number on the front cover of the manual. Cat. No. W394-E1-03 Revision code The following table outlines the changes made to the manual during each revision. Page numbers refer to the previous version.
  • Page 381 Revision History...
  • Page 382 Wegalaan 67-69, NL-2132 JD Hoofddorp The Netherlands Tel: (31)2356-81-300/Fax: (31)2356-81-388 OMRON ELECTRONICS LLC 1 East Commerce Drive, Schaumburg, IL 60173 U.S.A. Tel: (1)847-843-7900/Fax: (1)847-843-8568 OMRON ASIA PACIFIC PTE. LTD. 83 Clemenceau Avenue, #11-01, UE Square, Singapore 239920 Tel: (65)6835-3011/Fax: (65)6835-2711...
  • Page 383 Authorized Distributor: Cat. No. W394-E1-03 Note: Specifications subject to change without notice Printed in Japan...

This manual is also suitable for:

Cj1g-cpu seriesCj1g/h-cpu h seriesCj1m-cpu seriesCs1g/h-cpu ev1 seriesCs1g/h-cpu h series

Table of Contents

Save PDF